乐胖代购免代理版

{"id":"https://openalex.org/W2053966204","doi":"https://doi.org/10.1109/tvlsi.2013.2242909","title":"Time-Based All-Digital Technique for Analog Built-in Self-Test","display_name":"Time-Based All-Digital Technique for Analog Built-in Self-Test","publication_year":2013,"publication_date":"2013-02-19","ids":{"openalex":"https://openalex.org/W2053966204","doi":"https://doi.org/10.1109/tvlsi.2013.2242909","mag":"2053966204"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2013.2242909","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066629062","display_name":"Rajath Vasudevamurthy","orcid":"https://orcid.org/0000-0003-3963-330X"},"institutions":[{"id":"https://openalex.org/I59270414","display_name":"Indian Institute of Science Bangalore","ror":"https://ror.org/04dese585","country_code":"IN","type":"education","lineage":["https://openalex.org/I59270414"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rajath Vasudevamurthy","raw_affiliation_strings":["Dept. of Electr. Commun. Eng., Indian Inst. of Sci., Bangalore, India"],"affiliations":[{"raw_affiliation_string":"Dept. of Electr. Commun. Eng., Indian Inst. of Sci., Bangalore, India","institution_ids":["https://openalex.org/I59270414"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102429067","display_name":"Pratap Kumar Das","orcid":null},"institutions":[{"id":"https://openalex.org/I59270414","display_name":"Indian Institute of Science Bangalore","ror":"https://ror.org/04dese585","country_code":"IN","type":"education","lineage":["https://openalex.org/I59270414"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Pratap Kumar Das","raw_affiliation_strings":["Dept. of Electr. Commun. Eng., Indian Inst. of Sci., Bangalore, India"],"affiliations":[{"raw_affiliation_string":"Dept. of Electr. Commun. Eng., Indian Inst. of Sci., Bangalore, India","institution_ids":["https://openalex.org/I59270414"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091221053","display_name":"Bharadwaj Amrutur","orcid":"https://orcid.org/0009-0007-5062-6174"},"institutions":[{"id":"https://openalex.org/I59270414","display_name":"Indian Institute of Science Bangalore","ror":"https://ror.org/04dese585","country_code":"IN","type":"education","lineage":["https://openalex.org/I59270414"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Bharadwaj Amrutur","raw_affiliation_strings":["Dept. of Electr. Commun. Eng., Indian Inst. of Sci., Bangalore, India"],"affiliations":[{"raw_affiliation_string":"Dept. of Electr. Commun. Eng., Indian Inst. of Sci., Bangalore, India","institution_ids":["https://openalex.org/I59270414"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.551,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":9,"citation_normalized_percentile":{"value":0.752036,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":84,"max":85},"biblio":{"volume":"22","issue":"2","first_page":"334","last_page":"342"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.4835829}],"concepts":[{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.54689103},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.52440584},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5065261},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.49685457},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.4835829},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.47232622},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.46719122},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.44339094},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.43149692},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3507979},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.33335337},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3206152},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.20249262},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11884138}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2013.2242909","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.45,"display_name":"Sustainable cities and communities","id":"https://metadata.un.org/sdg/11"}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":90,"referenced_works":["https://openalex.org/W1494738794","https://openalex.org/W1524257762","https://openalex.org/W1548883899","https://openalex.org/W1552527487","https://openalex.org/W1554885925","https://openalex.org/W1557650244","https://openalex.org/W1589093285","https://openalex.org/W1592506358","https://openalex.org/W1595368737","https://openalex.org/W1597236814","https://openalex.org/W1621653743","https://openalex.org/W1667165204","https://openalex.org/W1686846969","https://openalex.org/W1773833020","https://openalex.org/W1826188091","https://openalex.org/W1963803510","https://openalex.org/W1964990224","https://openalex.org/W1969331325","https://openalex.org/W1982445074","https://openalex.org/W1985440524","https://openalex.org/W1990756583","https://openalex.org/W2009532400","https://openalex.org/W2015875528","https://openalex.org/W2016253482","https://openalex.org/W2034714147","https://openalex.org/W2036488048","https://openalex.org/W2063274752","https://openalex.org/W2065430789","https://openalex.org/W2065680840","https://openalex.org/W2066058136","https://openalex.org/W2081669014","https://openalex.org/W2082979872","https://openalex.org/W2089557579","https://openalex.org/W2096434843","https://openalex.org/W2097606121","https://openalex.org/W2097964046","https://openalex.org/W2098685036","https://openalex.org/W2100884184","https://openalex.org/W2101175460","https://openalex.org/W2102771100","https://openalex.org/W2103321164","https://openalex.org/W2105980164","https://openalex.org/W2108324407","https://openalex.org/W2108435403","https://openalex.org/W2110148769","https://openalex.org/W2111794941","https://openalex.org/W2114176791","https://openalex.org/W2116794360","https://openalex.org/W2121750485","https://openalex.org/W2121893773","https://openalex.org/W2129182275","https://openalex.org/W2129281276","https://openalex.org/W2129748997","https://openalex.org/W2130653422","https://openalex.org/W2130884788","https://openalex.org/W2131610230","https://openalex.org/W2132541442","https://openalex.org/W2135281359","https://openalex.org/W2136657726","https://openalex.org/W2137255658","https://openalex.org/W2137807823","https://openalex.org/W2140734619","https://openalex.org/W2141448832","https://openalex.org/W2150783292","https://openalex.org/W2153293882","https://openalex.org/W2154183610","https://openalex.org/W2156960698","https://openalex.org/W2157194265","https://openalex.org/W2157887705","https://openalex.org/W2160423692","https://openalex.org/W2163630970","https://openalex.org/W2166268103","https://openalex.org/W2166704794","https://openalex.org/W2168388401","https://openalex.org/W2169713829","https://openalex.org/W2169803859","https://openalex.org/W2188838890","https://openalex.org/W2258079038","https://openalex.org/W2279526171","https://openalex.org/W2288998059","https://openalex.org/W2340429540","https://openalex.org/W2740249436","https://openalex.org/W2942228371","https://openalex.org/W2953082699","https://openalex.org/W2980238657","https://openalex.org/W3037706425","https://openalex.org/W352761140","https://openalex.org/W4214744378","https://openalex.org/W4285719527","https://openalex.org/W605564925"],"related_works":["https://openalex.org/W4283030466","https://openalex.org/W3141258568","https://openalex.org/W2902302001","https://openalex.org/W2899084033","https://openalex.org/W2340228732","https://openalex.org/W2145015417","https://openalex.org/W2139890664","https://openalex.org/W2139774918","https://openalex.org/W2111909810","https://openalex.org/W1561253851"],"abstract_inverted_index":{"A":[0,42],"scheme":[1],"for":[2,12,27,150,155,173],"built-in":[3],"self-test":[4],"of":[5,34,55,69,72,78,91,106,159,167,169,179],"analog":[6,35,56,112],"signals":[7,36,152,175],"with":[8],"minimal":[9],"area":[10],"overhead":[11],"measuring":[13],"on-chip":[14],"voltages":[15],"in":[16,142,176],"an":[17,164],"all-digital":[18],"manner":[19],"is":[20,24,40,44,119,135,153,171],"presented.":[21],"The":[22,133],"method":[23],"well":[25],"suited":[26],"a":[28,70,76,86,89,110,122,139,143,156,160],"distributed":[29],"architecture,":[30],"where":[31],"the":[32,48,53,82,104,114,128,177],"routing":[33],"over":[37],"long":[38],"paths":[39],"minimized.":[41],"clock":[43],"routed":[45],"serially":[46],"to":[47,85,97,121,126],"sampling":[49,60],"heads":[50],"placed":[51],"at":[52,63],"nodes":[54],"test":[57,65,83,140],"voltages.":[58],"This":[59],"head":[61],"present":[62],"each":[64],"node,":[66],"which":[67],"consists":[68],"pair":[71,77,90,118],"delay":[73,123],"cells":[74],"and":[75,163],"flip-flops,":[79],"locally":[80],"converts":[81],"voltage":[84],"skew":[87,129],"between":[88,130],"subsampled":[92,100,116],"signals,":[93],"thus":[94],"giving":[95],"rise":[96],"as":[98,103],"many":[99],"signal":[101,117],"pairs":[102],"number":[105,166],"nodes.":[107],"To":[108],"measure":[109,127],"certain":[111],"voltage,":[113],"corresponding":[115],"fed":[120],"measurement":[124,157],"unit":[125],"this":[131],"pair.":[132],"concept":[134],"validated":[136],"by":[137],"designing":[138],"chip":[141],"UMC":[144],"130-nm":[145],"CMOS":[146],"process.":[147],"Sub-millivolt":[148],"accuracy":[149],"static":[151],"demonstrated":[154,172],"time":[158],"few":[161],"seconds,":[162],"effective":[165],"bits":[168],"5.29":[170],"low-bandwidth":[174],"absence":[178],"sample-and-hold":[180],"circuitry.":[181]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2053966204","counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2025-01-07T12:06:43.140991","created_date":"2016-06-24"}