{"id":"https://openalex.org/W2111443342","doi":"https://doi.org/10.1109/tvlsi.2009.2013981","title":"Fast Enhancement of Validation Test Sets for Improving the Stuck-at Fault Coverage of RTL Circuits","display_name":"Fast Enhancement of Validation Test Sets for Improving the Stuck-at Fault Coverage of RTL Circuits","publication_year":2009,"publication_date":"2009-03-30","ids":{"openalex":"https://openalex.org/W2111443342","doi":"https://doi.org/10.1109/tvlsi.2009.2013981","mag":"2111443342"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2009.2013981","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_indexed_in_scopus":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090078841","display_name":"Loganathan Lingappan","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"funder","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"L. Lingappan","raw_affiliation_strings":["Intel Corporation,Folsom,CA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Folsom,CA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006680539","display_name":"Vijay Gangaram","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"funder","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"V. Gangaram","raw_affiliation_strings":["Intel Corporation,Folsom,CA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Folsom,CA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086131079","display_name":"Niraj K. Jha","orcid":"https://orcid.org/0000-0002-1539-0369"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"funder","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"N.K. Jha","raw_affiliation_strings":["Dept. of Electr. Eng.,, Princeton Univ., Princeton, NJ"],"affiliations":[{"raw_affiliation_string":"Dept. of Electr. Eng.,, Princeton Univ., Princeton, NJ","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087206490","display_name":"S. Chakravarty","orcid":"https://orcid.org/0000-0002-3682-2060"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S. Chakravarty","raw_affiliation_strings":["LSI Corporation, Milpitas, CA"],"affiliations":[{"raw_affiliation_string":"LSI Corporation, Milpitas, CA","institution_ids":[]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.341,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":3,"citation_normalized_percentile":{"value":0.691487,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":74,"max":77},"biblio":{"volume":"17","issue":"5","first_page":"697","last_page":"708"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9997,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.98087406},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.43779957},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.4170867}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.98087406},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.63931084},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.6153084},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.6022816},{"id":"https://openalex.org/C203479927","wikidata":"https://www.wikidata.org/wiki/Q5165939","display_name":"Controller (irrigation)","level":2,"score":0.582959},{"id":"https://openalex.org/C169903167","wikidata":"https://www.wikidata.org/wiki/Q3985153","display_name":"Test set","level":2,"score":0.5566043},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.54772866},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.51912516},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45848697},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.43779957},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.4170867},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.37992418},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.34270385},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.23039228},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19611439},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.15305117},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.09061405},{"id":"https://openalex.org/C6557445","wikidata":"https://www.wikidata.org/wiki/Q173113","display_name":"Agronomy","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2009.2013981","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_indexed_in_scopus":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[],"grants":[],"datasets":[],"versions":[],"referenced_works_count":27,"referenced_works":["https://openalex.org/W1503570386","https://openalex.org/W1511398680","https://openalex.org/W1525885020","https://openalex.org/W1891950198","https://openalex.org/W1999039453","https://openalex.org/W2011848140","https://openalex.org/W2012039919","https://openalex.org/W2026584294","https://openalex.org/W2099986372","https://openalex.org/W2101919958","https://openalex.org/W2105571234","https://openalex.org/W2109202003","https://openalex.org/W2121668251","https://openalex.org/W2124628240","https://openalex.org/W2126042558","https://openalex.org/W2134415960","https://openalex.org/W2134454856","https://openalex.org/W2145738444","https://openalex.org/W2152476646","https://openalex.org/W2161314693","https://openalex.org/W2290100076","https://openalex.org/W4229759008","https://openalex.org/W4233176001","https://openalex.org/W4239189021","https://openalex.org/W4245022609","https://openalex.org/W4250319054","https://openalex.org/W4251716291"],"related_works":["https://openalex.org/W4285708951","https://openalex.org/W3009953521","https://openalex.org/W2786111245","https://openalex.org/W2408214455","https://openalex.org/W2129713538","https://openalex.org/W2128148266","https://openalex.org/W2091533492","https://openalex.org/W2021253405","https://openalex.org/W1991935474","https://openalex.org/W1953724919"],"abstract_inverted_index":{"A":[0,27,73],"digital":[1],"circuit":[2],"usually":[3,22],"comprises":[4],"a":[5,14,20,49,61,119],"controller":[6,16,35,42,54,79,94,140],"and":[7,138],"datapath.":[8,72],"The":[9,109],"time":[10,146],"spent":[11],"for":[12,67],"determining":[13],"valid":[15],"behavior":[17,36,141],"to":[18,33,77,98],"detect":[19],"fault":[21],"dominates":[23],"test":[24,29,58,63,85,107,131,144,154,167],"generation":[25,132,145],"time.":[26],"validation":[28,62,153],"set":[30,64,155],"is":[31,75,111,133,142,147],"used":[32,76],"verify":[34],"and,":[37],"hence,":[38],"it":[39],"activates":[40],"various":[41],"behaviors.":[43],"In":[44],"this":[45],"paper,":[46],"we":[47],"present":[48],"novel":[50],"methodology":[51,163],"wherein":[52],"the":[53,71,104,116,125,136,139,152,161],"behaviors":[55,80,95],"exercised":[56],"by":[57],"sequences":[59,159],"in":[60,70,115,124],"are":[65,96],"reused":[66],"detecting":[68],"faults":[69,123],"heuristic":[74,110],"identify":[78],"that":[81],"can":[82],"justify/propagate":[83],"pre-computed":[84],"vectors/responses":[86],"of":[87,118,121,157],"datapath":[88,126],"register-transfer":[89],"level":[90],"(RTL)":[91],"modules.":[92,128],"Such":[93],"said":[97],"be":[99],"compatible":[102],"with":[103],"corresponding":[105],"precomputed":[106],"vectors/responses.":[108],"fairly":[112],"accurate,":[113],"resulting":[114],"detection":[117],"majority":[120],"stuck-at":[122],"RTL":[127,137],"Also,":[129],"since":[130],"performed":[134],"at":[135],"predetermined,":[143],"reduced.":[148],"For":[149],"microprocessors,":[150],"if":[151],"consists":[156],"instruction":[158],"then":[160],"proposed":[162],"also":[164],"generates":[165],"instruction-level":[166],"sequences.":[168]},"abstract_inverted_index_v3":null,"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2111443342","counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-02-25T13:24:47.204068","created_date":"2016-06-24"}