{"id":"https://openalex.org/W2111531873","doi":"https://doi.org/10.1109/test.2008.4700574","title":"Power-Aware At-Speed Scan Test Methodology for Circuits with Synchronous Clocks","display_name":"Power-Aware At-Speed Scan Test Methodology for Circuits with Synchronous Clocks","publication_year":2008,"publication_date":"2008-10-01","ids":{"openalex":"https://openalex.org/W2111531873","doi":"https://doi.org/10.1109/test.2008.4700574","mag":"2111531873"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2008.4700574","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080636005","display_name":"Benoit Nadeau-Dostie","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Benoit Nadeau-Dostie","raw_affiliation_strings":["LogicVision, Inc."],"affiliations":[{"raw_affiliation_string":"LogicVision, Inc.","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072990504","display_name":"Kiyoshi Takeshita","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kiyoshi Takeshita","raw_affiliation_strings":["LogicVision, Inc."],"affiliations":[{"raw_affiliation_string":"LogicVision, Inc.","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102859877","display_name":"Jean-Fran\u00e7ois C\u00f4t\u00e9","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jean-Francois Cote","raw_affiliation_strings":["LogicVision, Inc."],"affiliations":[{"raw_affiliation_string":"LogicVision, Inc.","institution_ids":[]}]}],"institution_assertions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":4.801,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":28,"citation_normalized_percentile":{"value":0.906065,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":91},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.49108005}],"concepts":[{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.6491949},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6282662},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.58209646},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.5458839},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5269321},{"id":"https://openalex.org/C197424946","wikidata":"https://www.wikidata.org/wiki/Q1165717","display_name":"Waveform","level":3,"score":0.5219473},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.49108005},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4885062},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.46444112},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.45507163},{"id":"https://openalex.org/C49654631","wikidata":"https://www.wikidata.org/wiki/Q746165","display_name":"Shift register","level":3,"score":0.41834253},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3656726},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.30657429},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26773673},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2074722},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07556775},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/test.2008.4700574","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.85}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":11,"referenced_works":["https://openalex.org/W1521525104","https://openalex.org/W1905213452","https://openalex.org/W1908034516","https://openalex.org/W1914901661","https://openalex.org/W1986143702","https://openalex.org/W2111944961","https://openalex.org/W2114676663","https://openalex.org/W2143165581","https://openalex.org/W2143299987","https://openalex.org/W2151740582","https://openalex.org/W2160055399"],"related_works":["https://openalex.org/W4386968318","https://openalex.org/W4386292891","https://openalex.org/W4288754393","https://openalex.org/W4232628459","https://openalex.org/W2761125259","https://openalex.org/W2184933991","https://openalex.org/W2154529098","https://openalex.org/W2147289961","https://openalex.org/W2123022840","https://openalex.org/W2104478015"],"abstract_inverted_index":{"The":[0,44,59],"BurstModetrade":[1],"test":[2,34],"clocking":[3],"methodology,":[4],"first":[5],"presented":[6],"in,":[7],"is":[8,46,61],"improved":[9],"to":[10,24,33,48,63,67],"handle":[11],"circuits":[12],"with":[13],"synchronous":[14,35],"clocks":[15],"of":[16,29,72],"different":[17],"frequencies.":[18],"An":[19],"on-chip":[20],"clock":[21,30],"controller":[22],"allows":[23],"select":[25],"a":[26,64],"large":[27,65],"number":[28],"waveforms":[31],"necessary":[32],"cross-domain":[36],"paths":[37],"at-speed":[38,74],"and":[39,51,53],"control":[40],"supply":[41,70],"voltage":[42],"variations.":[43],"methodology":[45,60],"applicable":[47],"both":[49],"ATPG":[50],"BIST":[52,75],"only":[54],"requires":[55],"combinational":[56],"analysis":[57],"tools.":[58],"applied":[62],"circuit":[66],"adjust":[68],"power":[69],"margins":[71],"an":[73],"test.":[76]},"abstract_inverted_index_v3":null,"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2111531873","counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":5}],"updated_date":"2025-04-21T22:45:37.888995","created_date":"2016-06-24"}