{"id":"https://openalex.org/W2766355005","doi":"https://doi.org/10.1109/tcsi.2017.2762431","title":"A Variation-Aware Timing Modeling Approach for Write Operation in Hybrid CMOS/STT-MTJ Circuits","display_name":"A Variation-Aware Timing Modeling Approach for Write Operation in Hybrid CMOS/STT-MTJ Circuits","publication_year":2017,"publication_date":"2017-10-31","ids":{"openalex":"https://openalex.org/W2766355005","doi":"https://doi.org/10.1109/tcsi.2017.2762431","mag":"2766355005"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2017.2762431","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_indexed_in_scopus":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002197998","display_name":"Raffaele De Rose","orcid":"https://orcid.org/0000-0003-1184-1721"},"institutions":[{"id":"https://openalex.org/I45204951","display_name":"University of Calabria","ror":"https://ror.org/02rc97e94","country_code":"IT","type":"funder","lineage":["https://openalex.org/I45204951"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Raffaele De Rose","raw_affiliation_strings":["Department of Computer Engineering, University of Calabria, Rende, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of Calabria, Rende, Italy","institution_ids":["https://openalex.org/I45204951"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016654766","display_name":"Marco Lanuzza","orcid":"https://orcid.org/0000-0002-6480-9218"},"institutions":[{"id":"https://openalex.org/I45204951","display_name":"University of Calabria","ror":"https://ror.org/02rc97e94","country_code":"IT","type":"funder","lineage":["https://openalex.org/I45204951"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Marco Lanuzza","raw_affiliation_strings":["Department of Computer Engineering, University of Calabria, Rende, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of Calabria, Rende, Italy","institution_ids":["https://openalex.org/I45204951"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086668405","display_name":"Felice Crupi","orcid":"https://orcid.org/0000-0002-5011-6621"},"institutions":[{"id":"https://openalex.org/I45204951","display_name":"University of Calabria","ror":"https://ror.org/02rc97e94","country_code":"IT","type":"funder","lineage":["https://openalex.org/I45204951"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Felice Crupi","raw_affiliation_strings":["Department of Computer Engineering, University of Calabria, Rende, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of Calabria, Rende, Italy","institution_ids":["https://openalex.org/I45204951"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000042853","display_name":"Giulio Siracusano","orcid":"https://orcid.org/0000-0002-5390-5140"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"funder","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giulio Siracusano","raw_affiliation_strings":["Department of Electric, Electronic and computer Engineering, University of Catania, Catania, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Electric, Electronic and computer Engineering, University of Catania, Catania, Italy","institution_ids":["https://openalex.org/I39063666"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028721178","display_name":"Riccardo Tomasello","orcid":"https://orcid.org/0000-0002-9218-5633"},"institutions":[{"id":"https://openalex.org/I27483092","display_name":"University of Perugia","ror":"https://ror.org/00x27da85","country_code":"IT","type":"funder","lineage":["https://openalex.org/I27483092"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Riccardo Tomasello","raw_affiliation_strings":["Department of Engineering, University of Perugia, Terni, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Engineering, University of Perugia, Terni, Italy","institution_ids":["https://openalex.org/I27483092"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021617238","display_name":"Giovanni Finocchio","orcid":"https://orcid.org/0000-0002-1043-3876"},"institutions":[{"id":"https://openalex.org/I112862951","display_name":"University of Messina","ror":"https://ror.org/05ctdxz19","country_code":"IT","type":"funder","lineage":["https://openalex.org/I112862951"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giovanni Finocchio","raw_affiliation_strings":["Department of Mathematical and Computer Sciences, University of Messina, Messina, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Mathematical and Computer Sciences, University of Messina, Messina, Italy","institution_ids":["https://openalex.org/I112862951"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029016493","display_name":"Mario Carpentieri","orcid":"https://orcid.org/0000-0001-5165-5873"},"institutions":[{"id":"https://openalex.org/I68618741","display_name":"Polytechnic University of Bari","ror":"https://ror.org/03c44v465","country_code":"IT","type":"education","lineage":["https://openalex.org/I68618741"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Mario Carpentieri","raw_affiliation_strings":["Department of Electrical and Information Engineering, Politecnico di Bari, Bari, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Information Engineering, Politecnico di Bari, Bari, Italy","institution_ids":["https://openalex.org/I68618741"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052037141","display_name":"Massimo Alioto","orcid":"https://orcid.org/0000-0002-4127-8258"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"funder","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Massimo Alioto","raw_affiliation_strings":["Electrical and Computer Engineering Department, National University of Singapore, Singapore"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, National University of Singapore, Singapore","institution_ids":["https://openalex.org/I165932596"]}]}],"institution_assertions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.675,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":45,"citation_normalized_percentile":{"value":0.793442,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":96},"biblio":{"volume":"65","issue":"3","first_page":"1086","last_page":"1095"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10049","display_name":"Magnetic properties of thin films","score":0.9997,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10049","display_name":"Magnetic properties of thin films","score":0.9997,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9981,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9978,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/tunnel-magnetoresistance","display_name":"Tunnel magnetoresistance","score":0.6150131},{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.55652434},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.47949558}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6743385},{"id":"https://openalex.org/C56202322","wikidata":"https://www.wikidata.org/wiki/Q1884383","display_name":"Tunnel magnetoresistance","level":3,"score":0.6150131},{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.5886804},{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.55652434},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5023248},{"id":"https://openalex.org/C163716315","wikidata":"https://www.wikidata.org/wiki/Q901177","display_name":"Gaussian","level":2,"score":0.48345146},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.47949558},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4717601},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.45915356},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2541767},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.16600662},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14173532},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.1236403},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.11306012},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.0},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcsi.2017.2762431","pdf_url":null,"source":{"id":"https://openalex.org/S116977442","display_name":"IEEE Transactions on Circuits and Systems I Regular Papers","issn_l":"1549-8328","issn":["1549-8328","1558-0806"],"is_oa":false,"is_in_doaj":false,"is_indexed_in_scopus":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[],"grants":[],"datasets":[],"versions":[],"referenced_works_count":50,"referenced_works":["https://openalex.org/W191881348","https://openalex.org/W1964242651","https://openalex.org/W1964690991","https://openalex.org/W1972070513","https://openalex.org/W1974831841","https://openalex.org/W1976565216","https://openalex.org/W1985330137","https://openalex.org/W1988431200","https://openalex.org/W1993621148","https://openalex.org/W2003243790","https://openalex.org/W2003346399","https://openalex.org/W2004596214","https://openalex.org/W2019071604","https://openalex.org/W2020398077","https://openalex.org/W2022810388","https://openalex.org/W2025173691","https://openalex.org/W2029384065","https://openalex.org/W2040579068","https://openalex.org/W2052239558","https://openalex.org/W2066712022","https://openalex.org/W2067450411","https://openalex.org/W2069012355","https://openalex.org/W2069802488","https://openalex.org/W2070584461","https://openalex.org/W2071976647","https://openalex.org/W2083907455","https://openalex.org/W2094960953","https://openalex.org/W2102209351","https://openalex.org/W2103954785","https://openalex.org/W2138727735","https://openalex.org/W2150049803","https://openalex.org/W2185598583","https://openalex.org/W2303314981","https://openalex.org/W2317199330","https://openalex.org/W2318186648","https://openalex.org/W2328430807","https://openalex.org/W2331328369","https://openalex.org/W2398936240","https://openalex.org/W2525037638","https://openalex.org/W2539008933","https://openalex.org/W2550037452","https://openalex.org/W2565191458","https://openalex.org/W2580425382","https://openalex.org/W2585846899","https://openalex.org/W2735105938","https://openalex.org/W2743095234","https://openalex.org/W2743762435","https://openalex.org/W2757086665","https://openalex.org/W2975492176","https://openalex.org/W94194614"],"related_works":["https://openalex.org/W4214681414","https://openalex.org/W2897770615","https://openalex.org/W2160372845","https://openalex.org/W2157302797","https://openalex.org/W2131964951","https://openalex.org/W2034593071","https://openalex.org/W2032117939","https://openalex.org/W1977755618","https://openalex.org/W1890124164","https://openalex.org/W1545438037"],"abstract_inverted_index":{"In":[0,119,164],"this":[1],"paper,":[2],"a":[3,65,84,102,139,171],"variation-aware":[4],"simulation":[5],"framework":[6,22,79],"for":[7,73,138],"hybrid":[8],"circuits":[9],"comprising":[10],"MOS":[11],"transistors":[12],"and":[13,75,112],"magnetic":[14],"tunnel":[15],"junction":[16],"(MTJ)":[17],"devices":[18],"is":[19,23,99],"presented.":[20],"The":[21,78],"based":[24,46,126],"on":[25,101,127,208],"one-time":[26],"characterization":[27],"via":[28],"micromagnetic":[29,155],"multidomain":[30],"simulations,":[31],"overcoming":[32],"the":[33,42,56,70,81,123,134,175,187,190,203,213,216],"inaccuracies":[34],"introduced":[35],"by":[36,145,206],"single-domain":[37],"analysis,":[38],"which":[39,89],"most":[40],"of":[41,55,83,143,174,189,202,215],"existing":[43],"frameworks":[44],"are":[45,61],"on.":[47],"As":[48],"further":[49],"distinctive":[50],"capability,":[51],"non-Gaussian":[52],"stochastic":[53],"variations":[54],"MTJ":[57],"write":[58,140],"switching":[59,129],"time":[60,205],"explicitly":[62],"modeled":[63],"through":[64],"Skew":[66,149,191],"Normal":[67,192],"distribution,":[68],"making":[69],"model":[71,197],"suitable":[72],"low-power":[74],"low-voltage":[76],"designs.":[77],"involves":[80],"use":[82,214],"Verilog-A":[85,196],"look-up":[86],"table-based":[87],"model,":[88],"assures":[90],"easy":[91],"integration":[92],"with":[93,157,180,212],"commercial":[94],"design":[95],"tools.":[96],"Our":[97],"strategy":[98,151],"evaluated":[100],"spin-transfer":[103],"torque-magnetoresistive":[104],"random":[105,114],"access":[106],"memory":[107],"(MRAM)":[108],"working":[109],"in":[110,194,199],"RAM":[111,120],"true":[113],"number":[115],"generator":[116],"(TRNG)":[117],"modes.":[118],"mode,":[121,166],"while":[122],"commonly-used":[124],"approach":[125,168],"Gaussian-distributed":[128],"statistics":[130],"tends":[131],"to":[132],"underestimate":[133],"pulse":[135],"width":[136],"required":[137],"error":[141,160,182],"rate":[142],"10-6":[144],"about":[146],"20%,":[147],"our":[148,167,195],"Normal-based":[150],"allows":[152,170],"tracking":[153,173],"reference":[154,176],"results":[156,198],"an":[158,181,200],"average":[159,209],"less":[161,183],"than":[162,184],"4%.":[163],"TRNG":[165],"also":[169],"better":[172],"50%-switching":[177],"probability":[178],"contour":[179],"1%abs.":[185],"However,":[186],"incorporation":[188],"distribution":[193],"increase":[201],"CPU":[204],"50%":[207],"as":[210],"compared":[211],"built-in":[217],"statistical":[218],"functions.":[219]},"abstract_inverted_index_v3":null,"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2766355005","counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":11},{"year":2020,"cited_by_count":10},{"year":2019,"cited_by_count":9},{"year":2018,"cited_by_count":2}],"updated_date":"2025-04-20T19:54:20.132960","created_date":"2017-11-10"}