乐胖代购免代理版

{"id":"https://openalex.org/W4239309294","doi":"https://doi.org/10.1109/sbcci.2003.1232804","title":"Retiming finite state machines to control hardened data-paths","display_name":"Retiming finite state machines to control hardened data-paths","publication_year":2004,"publication_date":"2004-01-23","ids":{"openalex":"https://openalex.org/W4239309294","doi":"https://doi.org/10.1109/sbcci.2003.1232804"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci.2003.1232804","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"preprint","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090557751","display_name":"Ivan Aug\u00e9","orcid":null},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Ivan Aug\u00e9","raw_affiliation_strings":["ASIM Department of the LIP6, Universit\u00e9 Pierre et Marie Curie, Paris, France"],"affiliations":[{"raw_affiliation_string":"ASIM Department of the LIP6, Universit\u00e9 Pierre et Marie Curie, Paris, France","institution_ids":["https://openalex.org/I39804081"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021989067","display_name":"Fran\u00e7ois Donnet","orcid":null},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Fran\u00e7ois Donnet","raw_affiliation_strings":["ASIM Department of the LIP6, Universit\u00e9 Pierre et Marie Curie, Paris, France"],"affiliations":[{"raw_affiliation_string":"ASIM Department of the LIP6, Universit\u00e9 Pierre et Marie Curie, Paris, France","institution_ids":["https://openalex.org/I39804081"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085830369","display_name":"Fr\u00e9d\u00e9ric P\u00e9trot","orcid":"https://orcid.org/0000-0003-0624-7373"},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Fr\u00e9d\u00e9ric P\u00e9trot","raw_affiliation_strings":["ASIM Department of the LIP6, Universit\u00e9 Pierre et Marie Curie, Paris, France"],"affiliations":[{"raw_affiliation_string":"ASIM Department of the LIP6, Universit\u00e9 Pierre et Marie Curie, Paris, France","institution_ids":["https://openalex.org/I39804081"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":2,"citation_normalized_percentile":{"value":0.666667,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":68,"max":71},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/chaining","display_name":"Chaining","score":0.6707953},{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.62769985},{"id":"https://openalex.org/keywords/retiming","display_name":"Retiming","score":0.5659628},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-Level Synthesis","score":0.5276985}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.79985714},{"id":"https://openalex.org/C49020025","wikidata":"https://www.wikidata.org/wiki/Q1059099","display_name":"Chaining","level":2,"score":0.6707953},{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.62769985},{"id":"https://openalex.org/C167822520","wikidata":"https://www.wikidata.org/wiki/Q176452","display_name":"Finite-state machine","level":2,"score":0.57951266},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.5723073},{"id":"https://openalex.org/C41112130","wikidata":"https://www.wikidata.org/wiki/Q2146175","display_name":"Retiming","level":2,"score":0.5659628},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5549392},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.5276985},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5181121},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3516691},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.31442332},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.1938014},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11914465},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C542102704","wikidata":"https://www.wikidata.org/wiki/Q183257","display_name":"Psychotherapist","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci.2003.1232804","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},{"is_oa":false,"landing_page_url":"https://hal.archives-ouvertes.fr/hal-01534547","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":["Centre National de la Recherche Scientifique"],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},{"is_oa":false,"landing_page_url":"https://hal.science/hal-01534547","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[],"grants":[],"datasets":[],"versions":[],"referenced_works_count":18,"referenced_works":["https://openalex.org/W1555915743","https://openalex.org/W1567363020","https://openalex.org/W1966415715","https://openalex.org/W1972763734","https://openalex.org/W1993515879","https://openalex.org/W2030722754","https://openalex.org/W2043814276","https://openalex.org/W2108898076","https://openalex.org/W2115392332","https://openalex.org/W2118113314","https://openalex.org/W2120490412","https://openalex.org/W2129183345","https://openalex.org/W2134850972","https://openalex.org/W2146920519","https://openalex.org/W2148631003","https://openalex.org/W4238145537","https://openalex.org/W4248374175","https://openalex.org/W4249517846"],"related_works":["https://openalex.org/W2804025759","https://openalex.org/W2613207706","https://openalex.org/W2525382741","https://openalex.org/W2166021916","https://openalex.org/W2115166483","https://openalex.org/W2110860008","https://openalex.org/W2036863757","https://openalex.org/W1910608351","https://openalex.org/W1903431847","https://openalex.org/W1819235735"],"abstract_inverted_index":{"We":[0],"introduce":[1],"fine":[2],"grain":[3],"scheduling":[4],"(FGS)":[5],"as":[6,14],"a":[7,15,19,59,144],"postprocessing":[8],"step":[9],"to":[10,54,92,121],"circuits":[11,25],"classically":[12],"designed":[13],"datapath":[16],"controlled":[17],"by":[18,35,168],"finite":[20],"state":[21],"machine":[22],"(FSM).":[23],"Such":[24],"may":[26],"have":[27],"timing":[28],"errors,":[29],"particularly":[30,154],"if":[31,95],"they":[32],"are":[33,176],"generated":[34],"high":[36],"level":[37],"synthesis":[38],"(HLS)":[39],"tools":[40],"that":[41,150],"make":[42],"use":[43,117],"of":[44,75,85,118,125,135,160],"crude":[45],"temporal":[46],"estimates":[47],"during":[48],"scheduling.":[49],"FGS":[50,105,136,169],"reschedules":[51],"the":[52,63,72,76,93,96,123,151,158,171],"FSM":[53],"ensure":[55],"correct":[56],"execution":[57],"at":[58],"requested":[60],"frequency":[61],"on":[62,137],"data-path.":[64],"The":[65],"proposed":[66],"algorithm":[67],"takes":[68],"into":[69],"account":[70],"all":[71],"electrical":[73],"constraints":[74],"data-path,":[77],"namely":[78],"propagation":[79],"times,":[80],"set-up":[81],"and":[82,88,100,111,143,173],"hold":[83],"times":[84],"memorization":[86],"elements,":[87],"even":[89],"delays":[90],"due":[91],"interconnects":[94],"data-path":[97],"is":[98,153],"placed":[99],"routed":[101],"like":[102],"HLS":[103],"algorithms,":[104],"supports":[106],"multi-operators":[107],"cells,":[108],"multi-cycle":[109],"operators":[110,127],"chaining.":[112],"However":[113],"it":[114],"also":[115],"makes":[116],"multi-cycles":[119],"chaining":[120,124],"allow":[122],"several":[126,129],"over":[128],"cycles":[130],"without":[131],"intermediate":[132],"memorizations.":[133],"Experimentation":[134],"an":[138],"MPEG2":[139],"variable":[140],"length":[141],"decoder":[142,147],"full":[145],"MJPEG":[146],"has":[148],"demonstrated":[149],"approach":[152],"well":[155],"suited":[156],"for":[157],"design":[159],"asynchronous":[161],"coprocessors.":[162],"Synchronous":[163],"processors":[164],"cannot":[165],"be":[166],"scheduled":[167],"because":[170],"inputs":[172],"outputs":[174],"dates":[175],"modified.":[177]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W4239309294","counts_by_year":[],"updated_date":"2024-12-08T06:22:07.053833","created_date":"2022-05-12"}