乐胖代购免代理版

{"id":"https://openalex.org/W2786845740","doi":"https://doi.org/10.1109/reconfig.2017.8279792","title":"Fast generation of high throughput customized deep learning accelerators on FPGAs","display_name":"Fast generation of high throughput customized deep learning accelerators on FPGAs","publication_year":2017,"publication_date":"2017-12-01","ids":{"openalex":"https://openalex.org/W2786845740","doi":"https://doi.org/10.1109/reconfig.2017.8279792","mag":"2786845740"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2017.8279792","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014103790","display_name":"Hanqing Zeng","orcid":"https://orcid.org/0000-0002-2578-2147"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"funder","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hanqing Zeng","raw_affiliation_strings":["Ming Hsieh Department of Electrical Engineering, University of Southern California, Los Angeles, California"],"affiliations":[{"raw_affiliation_string":"Ming Hsieh Department of Electrical Engineering, University of Southern California, Los Angeles, California","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100458134","display_name":"Chi Zhang","orcid":"https://orcid.org/0000-0001-7374-1940"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"funder","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chi Zhang","raw_affiliation_strings":["Department of Computer Science, University of Southern California, Los Angeles, California"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of Southern California, Los Angeles, California","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033166029","display_name":"Viktor K. Prasanna","orcid":"https://orcid.org/0000-0002-1609-8589"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"funder","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Viktor Prasanna","raw_affiliation_strings":["Ming Hsieh Department of Electrical Engineering, University of Southern California, Los Angeles, California"],"affiliations":[{"raw_affiliation_string":"Ming Hsieh Department of Electrical Engineering, University of Southern California, Los Angeles, California","institution_ids":["https://openalex.org/I1174212"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.781,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":24,"citation_normalized_percentile":{"value":0.925662,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":92,"max":93},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9998,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9998,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9928,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11689","display_name":"Adversarial Robustness in Machine Learning","score":0.9852,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.56081855},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.41391644}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.84439325},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.80400467},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.68992573},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.59451973},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5625168},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5612505},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.56081855},{"id":"https://openalex.org/C108583219","wikidata":"https://www.wikidata.org/wiki/Q197536","display_name":"Deep learning","level":2,"score":0.41722974},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4163222},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.41391644},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.36931354},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.32089862},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.23618713},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.10202557},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09146497}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2017.8279792","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":20,"referenced_works":["https://openalex.org/W1686810756","https://openalex.org/W1969057818","https://openalex.org/W2030081822","https://openalex.org/W2086465551","https://openalex.org/W2094756095","https://openalex.org/W2096313289","https://openalex.org/W2155893237","https://openalex.org/W2163605009","https://openalex.org/W2171656599","https://openalex.org/W2172654076","https://openalex.org/W2255738257","https://openalex.org/W2271840356","https://openalex.org/W2276486856","https://openalex.org/W2294282016","https://openalex.org/W2523838129","https://openalex.org/W2562773490","https://openalex.org/W2584616277","https://openalex.org/W2962835968","https://openalex.org/W2963751813","https://openalex.org/W4242577057"],"related_works":["https://openalex.org/W4313484792","https://openalex.org/W4313341326","https://openalex.org/W4312121077","https://openalex.org/W4288420200","https://openalex.org/W4282568311","https://openalex.org/W2951473296","https://openalex.org/W2883928845","https://openalex.org/W2604877941","https://openalex.org/W2390885485","https://openalex.org/W2387264083"],"abstract_inverted_index":{"Accelerating":[0],"CNNs":[1,55,233],"has":[2,12],"been":[3],"an":[4,38,86],"active":[5],"area":[6],"of":[7,54,67,117,163,178,199,232],"research.":[8],"Research":[9],"on":[10,91,174,190,230,248],"GPU":[11],"led":[13],"to":[14,138],"several":[15],"well-developed":[16],"open-source":[17],"tools":[18,31],"such":[19,28,131],"as":[20,61,81,132,217],"CAFFE":[21],"and":[22,56,71,76,100,113,120,135,161,166,185,201,210,221,234],"TensorFlow.":[23],"However,":[24],"for":[25,48,145,158,172],"FPGA":[26,74,206,236],"accelerators,":[27],"design":[29,107,111,129],"automation":[30],"are":[32],"not":[33],"yet":[34],"available.":[35],"We":[36],"propose":[37],"automatic":[39],"code":[40],"generation":[41],"tool":[42,59,84,121,142,214,241],"that":[43,171,239],"synthesizes":[44],"high":[45,64],"throughput":[46,144,177,198],"accelerators":[47],"CNN":[49,69],"inferencing":[50,173],"targeting":[51],"broad":[52],"types":[53],"FPGAs.":[57],"The":[58,83,141,197,213],"takes":[60],"input":[62],"a":[63,146,218,249],"level":[65],"description":[66],"the":[68,72,152,191,240],"model":[70],"target":[73,235],"device,":[75],"generates":[77],"fully":[78],"synthesizable":[79],"Verilog":[80],"output.":[82],"adopts":[85],"algorithm-architecture":[87],"co-design":[88],"methodology":[89],"based":[90],"frequency":[92],"domain":[93],"convolution.":[94],"Our":[95],"proposed":[96],"algorithm":[97],"called":[98],"Concatenate":[99],"Pad":[101],"(CaP),":[102],"together":[103],"with":[104],"our":[105],"efficient":[106],"space":[108],"exploration,":[109],"ensure":[110],"modularity":[112],"scalability":[114],"(in":[115],"terms":[116],"routing":[118],"complexity":[119],"execution":[122],"time).":[123],"Users":[124],"can":[125],"optionally":[126],"customize":[127],"various":[128,226],"parameters,":[130],"FFT":[133],"sizes":[134],"hardware":[136],"resources":[137],"be":[139],"used.":[140],"optimizes":[143],"user":[147],"specified":[148],"hardware.":[149],"To":[150],"illustrate":[151],"tool,":[153],"we":[154],"generate":[155],"optimized":[156],"designs":[157,203],"AlexNet,":[159],"VGG16":[160,202],"variations":[162],"them":[164],"(AlexNet\u2217":[165],"VGG16\u2217).":[167],"Experimental":[168],"results":[169],"show":[170,238],"these":[175],"models,":[176],"274.5":[179],"GOPS,":[180,182],"660.9":[181],"283.2":[183],"GOPS":[184,187],"623.0":[186],"is":[188,215,222],"achieved":[189],"Intel":[192],"HARP":[193],"(version":[194],"0)":[195],"platform.":[196],"AlexNet":[200],"outperform":[204],"state-of-the-art":[205],"implementations":[207],"by":[208],"1.85x":[209],"3.53x":[211],"respectively.":[212],"delivered":[216],"Python3":[219],"package,":[220],"easily":[223],"portable":[224],"onto":[225],"computing":[227],"platforms.":[228],"Experiments":[229],"variety":[231],"devices":[237],"runs":[242],"in":[243],"less":[244],"than":[245],"20":[246],"seconds":[247],"commodity":[250],"desktop.":[251]},"abstract_inverted_index_v3":null,"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2786845740","counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":1}],"updated_date":"2025-02-22T11:45:43.652395","created_date":"2018-02-23"}