{"id":"https://openalex.org/W2126497765","doi":"https://doi.org/10.1109/pdp.2007.34","title":"Design and Implementation of Floating Point Stack on General RISC Architecture","display_name":"Design and Implementation of Floating Point Stack on General RISC Architecture","publication_year":2007,"publication_date":"2007-02-01","ids":{"openalex":"https://openalex.org/W2126497765","doi":"https://doi.org/10.1109/pdp.2007.34","mag":"2126497765"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/pdp.2007.34","pdf_url":null,"source":{"id":"https://openalex.org/S4210178956","display_name":"Proceedings - Euromicro Workshop on Parallel and Distributed Processing/Proceedings","issn_l":"1066-6192","issn":["1066-6192","2377-5750"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047215143","display_name":"Xuehai Qian","orcid":null},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xuehai Qian","raw_affiliation_strings":["Inst. of Comput. Technol., Chinese Acad. of Sci."],"affiliations":[{"raw_affiliation_string":"Inst. of Comput. Technol., Chinese Acad. of Sci.","institution_ids":["https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036072216","display_name":"He Huang","orcid":"https://orcid.org/0000-0001-5581-1423"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"He Huang","raw_affiliation_strings":["Inst. of Comput. Technol., Chinese Acad. of Sci."],"affiliations":[{"raw_affiliation_string":"Inst. of Comput. Technol., Chinese Acad. of Sci.","institution_ids":["https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100397026","display_name":"Hao Zhang","orcid":"https://orcid.org/0000-0003-1991-119X"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hao Zhang","raw_affiliation_strings":["Inst. of Comput. Technol., Chinese Acad. of Sci."],"affiliations":[{"raw_affiliation_string":"Inst. of Comput. Technol., Chinese Acad. of Sci.","institution_ids":["https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103437255","display_name":"Guoping Long","orcid":null},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Guoping Long","raw_affiliation_strings":["Inst. of Comput. Technol., Chinese Acad. of Sci."],"affiliations":[{"raw_affiliation_string":"Inst. of Comput. Technol., Chinese Acad. of Sci.","institution_ids":["https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101999695","display_name":"Junchao Zhang","orcid":"https://orcid.org/0000-0003-0367-2358"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Junchao Zhang","raw_affiliation_strings":["Inst. of Comput. Technol., Chinese Acad. of Sci."],"affiliations":[{"raw_affiliation_string":"Inst. of Comput. Technol., Chinese Acad. of Sci.","institution_ids":["https://openalex.org/I19820366"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011407484","display_name":"Dongrui Fan","orcid":"https://orcid.org/0000-0001-5219-0908"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dongrui Fan","raw_affiliation_strings":["Inst. of Comput. Technol., Chinese Acad. of Sci."],"affiliations":[{"raw_affiliation_string":"Inst. of Comput. Technol., Chinese Acad. of Sci.","institution_ids":["https://openalex.org/I19820366"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":0,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":0,"max":63},"biblio":{"volume":null,"issue":null,"first_page":"238","last_page":"245"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9974,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/x86","display_name":"x86","score":0.9281276},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.46904665},{"id":"https://openalex.org/keywords/call-stack","display_name":"Call stack","score":0.45182794},{"id":"https://openalex.org/keywords/table","display_name":"Table (database)","score":0.4468134},{"id":"https://openalex.org/keywords/out-of-order-execution","display_name":"Out-of-order execution","score":0.43844095},{"id":"https://openalex.org/keywords/processor-register","display_name":"Processor register","score":0.43535686},{"id":"https://openalex.org/keywords/arm-architecture","display_name":"ARM architecture","score":0.42547584}],"concepts":[{"id":"https://openalex.org/C170723468","wikidata":"https://www.wikidata.org/wiki/Q182933","display_name":"x86","level":3,"score":0.9281276},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8046544},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.77117956},{"id":"https://openalex.org/C9395851","wikidata":"https://www.wikidata.org/wiki/Q177929","display_name":"Stack (abstract data type)","level":2,"score":0.6413208},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.5079711},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.49166375},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.48983285},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.47925162},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.47214082},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.46904665},{"id":"https://openalex.org/C119024030","wikidata":"https://www.wikidata.org/wiki/Q759899","display_name":"Call stack","level":3,"score":0.45182794},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.4468134},{"id":"https://openalex.org/C1793878","wikidata":"https://www.wikidata.org/wiki/Q1153762","display_name":"Out-of-order execution","level":2,"score":0.43844095},{"id":"https://openalex.org/C2871975","wikidata":"https://www.wikidata.org/wiki/Q187466","display_name":"Processor register","level":4,"score":0.43535686},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.42904386},{"id":"https://openalex.org/C26771161","wikidata":"https://www.wikidata.org/wiki/Q16980","display_name":"ARM architecture","level":2,"score":0.42547584},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3988989},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.12897259},{"id":"https://openalex.org/C153247305","wikidata":"https://www.wikidata.org/wiki/Q835713","display_name":"Memory address","level":3,"score":0.11442858},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/pdp.2007.34","pdf_url":null,"source":{"id":"https://openalex.org/S4210178956","display_name":"Proceedings - Euromicro Workshop on Parallel and Distributed Processing/Proceedings","issn_l":"1066-6192","issn":["1066-6192","2377-5750"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.41}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":5,"referenced_works":["https://openalex.org/W1555915743","https://openalex.org/W1757737287","https://openalex.org/W2034823881","https://openalex.org/W2101667230","https://openalex.org/W2169578477"],"related_works":["https://openalex.org/W4310486817","https://openalex.org/W2982642548","https://openalex.org/W2953955260","https://openalex.org/W2887660155","https://openalex.org/W2439357447","https://openalex.org/W2126497765","https://openalex.org/W2060480557","https://openalex.org/W2053774775","https://openalex.org/W1680705574","https://openalex.org/W1485761350"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,18,27],"framework":[4],"for":[5,112],"implementing":[6],"the":[7,33,43,74,100],"X86":[8],"FP":[9,34,51,65],"stack":[10,35],"used":[11],"in":[12,64,68],"an":[13,69],"x86-compliant":[14],"processor":[15],"based":[16],"on":[17,76,85,118],"general":[19],"RISC":[20,29],"architecture.":[21],"Architectural":[22],"supports":[23],"are":[24,40,92,107],"added":[25],"to":[26,31,42,46,60],"typical":[28],"architecture":[30],"maintain":[32],"status.":[36],"Some":[37],"speculative":[38],"techniques":[39],"applied":[41],"decode":[44],"stage":[45],"enable":[47],"pipelined":[48],"and":[49,115],"efficient":[50],"operations.":[52],"An":[53],"optimized":[54],"register":[55,77],"renaming":[56],"scheme":[57],"is":[58],"proposed":[59],"eliminate":[61],"redundant":[62],"micro-ops":[63,91,96],"programs,":[66,114],"resulting":[67],"increased":[70],"performance":[71],"while":[72],"mitigating":[73],"burden":[75],"rename":[78],"table.":[79],"The":[80,104],"simulation":[81],"results":[82],"show":[83],"that":[84],"average":[86,119],"more":[87],"than":[88],"10%":[89,117],"fmov":[90],"removed.":[93],"Elimination":[94],"of":[95,102],"significantly":[97],"speeds":[98],"up":[99],"execution":[101],"programs.":[103],"IPC":[105],"increases":[106],"as":[108,110],"high":[109],"30%":[111],"some":[113],"near":[116]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2126497765","counts_by_year":[],"updated_date":"2024-12-09T00:21:03.333567","created_date":"2016-06-24"}