{"id":"https://openalex.org/W2519428907","doi":"https://doi.org/10.1109/nana.2016.55","title":"The Design and Implementation of a NoC System Based on SoCKit","display_name":"The Design and Implementation of a NoC System Based on SoCKit","publication_year":2016,"publication_date":"2016-07-01","ids":{"openalex":"https://openalex.org/W2519428907","doi":"https://doi.org/10.1109/nana.2016.55","mag":"2519428907"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/nana.2016.55","pdf_url":null,"source":{"id":"https://openalex.org/S4363608588","display_name":"2022 International Conference on Networking and Network Applications (NaNA)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025378279","display_name":"Hongwei Ye","orcid":"https://orcid.org/0000-0001-7079-1483"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hongwei Ye","raw_affiliation_strings":["Institute of Computer, Xidian University, Xi'an, China"],"affiliations":[{"raw_affiliation_string":"Institute of Computer, Xidian University, Xi'an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100418247","display_name":"Quan Wang","orcid":"https://orcid.org/0000-0001-6913-8604"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Quan Wang","raw_affiliation_strings":["Institute of Computer, Xidian University, Xi'an, China"],"affiliations":[{"raw_affiliation_string":"Institute of Computer, Xidian University, Xi'an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101664267","display_name":"Pengfei Yang","orcid":"https://orcid.org/0000-0003-4065-4052"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Pengfei Yang","raw_affiliation_strings":["Institute of Computer, Xidian University, Xi'an, China"],"affiliations":[{"raw_affiliation_string":"Institute of Computer, Xidian University, Xi'an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077729909","display_name":"Wei Li","orcid":"https://orcid.org/0000-0002-2506-7004"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wei Li","raw_affiliation_strings":["Institute of Computer, Xidian University, Xi'an, China"],"affiliations":[{"raw_affiliation_string":"Institute of Computer, Xidian University, Xi'an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048614443","display_name":"Zhibin Yu","orcid":"https://orcid.org/0000-0001-8067-9612"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhibin Yu","raw_affiliation_strings":["Institute of Computer, Xidian University, Xi'an, China"],"affiliations":[{"raw_affiliation_string":"Institute of Computer, Xidian University, Xi'an, China","institution_ids":["https://openalex.org/I149594827"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.221,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":1,"citation_normalized_percentile":{"value":0.238825,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":66,"max":73},"biblio":{"volume":"9","issue":null,"first_page":"145","last_page":"148"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9873,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9746,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.83400685}],"concepts":[{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.83400685},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.74213123},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7113878},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.689787},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.66175294},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5276122},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.5274972},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5175356},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.50448596},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.49279502},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.48199362},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.475999},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.47318769},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.4602858},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4533077},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.4183105},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3832792},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.24867779},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19456187},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.17718074},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12825724},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/nana.2016.55","pdf_url":null,"source":{"id":"https://openalex.org/S4363608588","display_name":"2022 International Conference on Networking and Network Applications (NaNA)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.44}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":9,"referenced_works":["https://openalex.org/W1969899927","https://openalex.org/W2068109030","https://openalex.org/W2104730156","https://openalex.org/W2118690501","https://openalex.org/W2120538858","https://openalex.org/W2142484548","https://openalex.org/W2145620555","https://openalex.org/W2183152491","https://openalex.org/W3149127186"],"related_works":["https://openalex.org/W4281711577","https://openalex.org/W4230458348","https://openalex.org/W3198758847","https://openalex.org/W2994908368","https://openalex.org/W2540211551","https://openalex.org/W2189025524","https://openalex.org/W2178653557","https://openalex.org/W2144357574","https://openalex.org/W2106200299","https://openalex.org/W1966325333"],"abstract_inverted_index":{"With":[0],"the":[1,7,53,58,63],"further":[2],"increase":[3],"in":[4],"integration":[5],"density,":[6],"network-based":[8],"highly":[9],"parallel":[10],"System":[11],"on":[12,49,62,67],"Chip":[13,24],"(SoC)":[14],"has":[15],"evolved":[16],"as":[17],"a":[18,43,87],"promising":[19],"on-chip":[20],"interconnect":[21],"for":[22,35],"future":[23],"Multi-Processors":[25],"(CMPs).":[26],"The":[27,80],"high":[28],"performance":[29],"SOC":[30],"platform":[31],"is":[32,83],"quite":[33],"serviceable":[34],"MPSoC":[36],"research.":[37],"In":[38],"this":[39],"paper,":[40],"we":[41],"built":[42],"typical":[44],"NoC":[45,68],"(Network":[46],"on-chip)":[47],"system":[48,59,81],"SoCKit,":[50],"and":[51,55,78],"designed":[52],"hardware":[54],"software":[56],"of":[57],"which":[60],"based":[61],"previous":[64],"theory":[65],"research":[66],"including":[69],"fault":[70],"tolerant":[71],"topology,":[72],"adaptive":[73],"routing":[74],"algorithm,":[75],"task":[76],"scheduling":[77],"mapping.":[79],"function":[82],"verified":[84],"by":[85],"running":[86],"halftone":[88],"algorithm.":[89]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2519428907","counts_by_year":[{"year":2019,"cited_by_count":1}],"updated_date":"2024-12-09T04:43:45.169729","created_date":"2016-09-23"}