{"id":"https://openalex.org/W2027068228","doi":"https://doi.org/10.1109/mm.2014.1","title":"Operating Systems Research for Reconfigurable Computing","display_name":"Operating Systems Research for Reconfigurable Computing","publication_year":2014,"publication_date":"2014-01-01","ids":{"openalex":"https://openalex.org/W2027068228","doi":"https://doi.org/10.1109/mm.2014.1","mag":"2027068228"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/mm.2014.1","pdf_url":null,"source":{"id":"https://openalex.org/S59697426","display_name":"IEEE Micro","issn_l":"0272-1732","issn":["0272-1732","1937-4143"],"is_oa":false,"is_in_doaj":false,"is_indexed_in_scopus":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5062434121","display_name":"David Andrews","orcid":"https://orcid.org/0000-0003-1464-7107"},"institutions":[{"id":"https://openalex.org/I78715868","display_name":"University of Arkansas at Fayetteville","ror":"https://ror.org/05jbt9m15","country_code":"US","type":"funder","lineage":["https://openalex.org/I78715868"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"David Andrews","raw_affiliation_strings":["CSCE Dept., Univ. of Arkansas, Fayetteville, AR, USA"],"affiliations":[{"raw_affiliation_string":"CSCE Dept., Univ. of Arkansas, Fayetteville, AR, USA","institution_ids":["https://openalex.org/I78715868"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5062434121"],"corresponding_institution_ids":["https://openalex.org/I78715868"],"apc_list":null,"apc_paid":null,"fwci":0.348,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":3,"citation_normalized_percentile":{"value":0.622319,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":76,"max":79},"biblio":{"volume":"34","issue":"1","first_page":"54","last_page":"58"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9985,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable Computing","score":0.560384},{"id":"https://openalex.org/keywords/symmetric-multiprocessor-system","display_name":"Symmetric multiprocessor system","score":0.48200217},{"id":"https://openalex.org/keywords/embedded-operating-system","display_name":"Embedded operating system","score":0.4261926}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8379338},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.83476263},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.6623299},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6414546},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5822818},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.560384},{"id":"https://openalex.org/C172430144","wikidata":"https://www.wikidata.org/wiki/Q17111997","display_name":"Symmetric multiprocessor system","level":2,"score":0.48200217},{"id":"https://openalex.org/C35939892","wikidata":"https://www.wikidata.org/wiki/Q1139923","display_name":"Embedded operating system","level":3,"score":0.4261926},{"id":"https://openalex.org/C9652623","wikidata":"https://www.wikidata.org/wiki/Q190109","display_name":"Field (mathematics)","level":2,"score":0.42294657},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.36557436},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.23224959},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C202444582","wikidata":"https://www.wikidata.org/wiki/Q837863","display_name":"Pure mathematics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/mm.2014.1","pdf_url":null,"source":{"id":"https://openalex.org/S59697426","display_name":"IEEE Micro","issn_l":"0272-1732","issn":["0272-1732","1937-4143"],"is_oa":false,"is_in_doaj":false,"is_indexed_in_scopus":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.51,"id":"https://metadata.un.org/sdg/7"}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":18,"referenced_works":["https://openalex.org/W1480230076","https://openalex.org/W1982516565","https://openalex.org/W1993168130","https://openalex.org/W1996426321","https://openalex.org/W2002931018","https://openalex.org/W2006312753","https://openalex.org/W2102193208","https://openalex.org/W2114627181","https://openalex.org/W2116985409","https://openalex.org/W2117170259","https://openalex.org/W2130224785","https://openalex.org/W2131005318","https://openalex.org/W2138648762","https://openalex.org/W2145448700","https://openalex.org/W2149777400","https://openalex.org/W2149935414","https://openalex.org/W2168874286","https://openalex.org/W2534016374"],"related_works":["https://openalex.org/W3164085601","https://openalex.org/W2283291034","https://openalex.org/W2170132667","https://openalex.org/W2152074211","https://openalex.org/W2139962137","https://openalex.org/W2129019972","https://openalex.org/W2126857316","https://openalex.org/W2051367001","https://openalex.org/W1612076744","https://openalex.org/W1522032972"],"abstract_inverted_index":{"This":[0],"article":[1],"overviews":[2],"how":[3],"the":[4,22,39,45],"rapid":[5],"changes":[6],"to":[7,26],"field-programmable":[8],"gate":[9],"array":[10],"(FPGA)":[11],"devices":[12],"have":[13],"refocused":[14],"operating":[15,30,51],"systems":[16,52],"research":[17,34],"within":[18],"reconfigurable":[19],"computing.":[20],"Where":[21],"goal":[23],"was":[24],"once":[25],"simply":[27],"use":[28],"existing":[29],"systems,":[31],"FPGA-based":[32],"OS":[33],"may":[35],"now":[36],"be":[37],"in":[38],"new":[40],"position":[41],"of":[42,49],"helping":[43],"define":[44],"look":[46],"and":[47],"feel":[48],"next-generation":[50],"for":[53],"evolving":[54],"chip-heterogeneous":[55],"multiprocessor":[56],"systems.":[57]},"abstract_inverted_index_v3":null,"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2027068228","counts_by_year":[{"year":2020,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2025-03-24T18:16:01.234724","created_date":"2016-06-24"}