{"id":"https://openalex.org/W2018234380","doi":"https://doi.org/10.1109/mdt.2011.14","title":"Embedded Memories: Progress and a Look into the Future","display_name":"Embedded Memories: Progress and a Look into the Future","publication_year":2011,"publication_date":"2011-01-01","ids":{"openalex":"https://openalex.org/W2018234380","doi":"https://doi.org/10.1109/mdt.2011.14","mag":"2018234380"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.2011.14","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_indexed_in_scopus":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111413444","display_name":"Kiyoo Itoh","orcid":null},"institutions":[{"id":"https://openalex.org/I65143321","display_name":"Hitachi (Japan)","ror":"https://ror.org/02exqgm79","country_code":"JP","type":"company","lineage":["https://openalex.org/I65143321"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Kiyoo Itoh","raw_affiliation_strings":["Central Res. Lab., Hitachi, Ltd., Kokubunji, Japan"],"affiliations":[{"raw_affiliation_string":"Central Res. Lab., Hitachi, Ltd., Kokubunji, Japan","institution_ids":["https://openalex.org/I65143321"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5111413444"],"corresponding_institution_ids":["https://openalex.org/I65143321"],"apc_list":null,"apc_paid":null,"fwci":1.879,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":13,"citation_normalized_percentile":{"value":0.881295,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":86,"max":87},"biblio":{"volume":"28","issue":"1","first_page":"10","last_page":"13"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9952,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9952,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9717,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9602,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.61824036},{"id":"https://openalex.org/keywords/non-volatile-random-access-memory","display_name":"Non-volatile random-access memory","score":0.57534665},{"id":"https://openalex.org/keywords/ferroelectric-ram","display_name":"Ferroelectric RAM","score":0.5408741},{"id":"https://openalex.org/keywords/universal-memory","display_name":"Universal Memory","score":0.50337976},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-Volatile Memory","score":0.44980824}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6486555},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.61824036},{"id":"https://openalex.org/C34172316","wikidata":"https://www.wikidata.org/wiki/Q499024","display_name":"Non-volatile random-access memory","level":5,"score":0.57534665},{"id":"https://openalex.org/C161164327","wikidata":"https://www.wikidata.org/wiki/Q703656","display_name":"Ferroelectric RAM","level":4,"score":0.5408741},{"id":"https://openalex.org/C195053848","wikidata":"https://www.wikidata.org/wiki/Q7894141","display_name":"Universal memory","level":5,"score":0.50337976},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.4800597},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47404906},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.4564216},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.44980824},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.37177923},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.3154991},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.28640622},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.27001062},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2156663},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0935761}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.2011.14","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_indexed_in_scopus":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.45,"id":"https://metadata.un.org/sdg/7"}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W3213862435","https://openalex.org/W3091205277","https://openalex.org/W3002942576","https://openalex.org/W2769084511","https://openalex.org/W2492851785","https://openalex.org/W2199137887","https://openalex.org/W2188534734","https://openalex.org/W2185519377","https://openalex.org/W1880676300","https://openalex.org/W1514385342"],"abstract_inverted_index":{"Memories":[0],"are":[1,60],"categorized":[2],"as":[3,37,72],"embedded":[4],"memories":[5,43,117],"(e-memories)":[6],"and":[7,51,66,82,85,94,118],"stand-alone":[8],"memories.":[9],"E-memories":[10],"favor":[11],"high":[12,53,57],"speed":[13],"rather":[14,55],"than":[15,56],"low":[16,49],"cost.":[17],"In":[18,40],"addition,":[19],"they":[20,29],"must":[21,30],"maintain":[22],"compatibility":[23],"with":[24],"the":[25,34,38,45,102],"logic":[26],"process,":[27],"because":[28],"be":[31],"cofabricated":[32],"on":[33],"same":[35],"chip":[36],"logic.":[39],"contrast,":[41],"standalone":[42],"give":[44],"first":[46],"priority":[47],"to":[48,100],"cost":[50],"thus":[52],"density":[54],"speed.":[58],"There":[59],"two":[61,91],"types":[62],"of":[63,80,111],"e-memories:":[64],"RAMs":[65,75,88,120],"ROMs":[67,108],"(or":[68],"\"almost":[69],"ROMs\"":[70],"such":[71],"flash":[73,116],"memories).":[74],"ensure":[76,109],"an":[77],"unlimited":[78],"number":[79],"read":[81],"write":[83],"cycles,":[84],"at":[86,105],"present,":[87],"come":[89],"in":[90],"types:":[92],"SRAMs,":[93],"DRAMs":[95],"that":[96],"necessitate":[97],"refresh":[98],"operations":[99],"retain":[101],"data":[103],"stored":[104,112],"cell":[106],"capacitors.":[107],"nonvolatility":[110],"data,":[113],"exemplified":[114],"by":[115],"ferroelectric":[119],"(FeRAMs).":[121]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2018234380","counts_by_year":[{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":4}],"updated_date":"2025-01-18T19:44:53.136360","created_date":"2016-06-24"}