{"id":"https://openalex.org/W4296339345","doi":"https://doi.org/10.1109/lascas53948.2022.9893905","title":"Full System Exploration of On-Chip Wireless Communication on Many-Core Architectures","display_name":"Full System Exploration of On-Chip Wireless Communication on Many-Core Architectures","publication_year":2022,"publication_date":"2022-03-01","ids":{"openalex":"https://openalex.org/W4296339345","doi":"https://doi.org/10.1109/lascas53948.2022.9893905"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas53948.2022.9893905","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://infoscience.epfl.ch/record/294840/files/Full%20System%20Exploration%20of%20On-Chip%20Wireless%20Communication%20on%20Many-Core%20Architectures.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5040240246","display_name":"Rafael Medina Morillas","orcid":"https://orcid.org/0000-0002-1349-5351"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Rafael Medina","raw_affiliation_strings":["Embedded Systems Laboratory (ESL), EPFL, Switzerland"],"affiliations":[{"raw_affiliation_string":"Embedded Systems Laboratory (ESL), EPFL, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064542525","display_name":"Joshua Kein","orcid":null},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Joshua Kein","raw_affiliation_strings":["Embedded Systems Laboratory (ESL), EPFL, Switzerland"],"affiliations":[{"raw_affiliation_string":"Embedded Systems Laboratory (ESL), EPFL, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102011817","display_name":"Yasir Mahmood Qureshi","orcid":"https://orcid.org/0000-0002-2516-3899"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Yasir Qureshi","raw_affiliation_strings":["Embedded Systems Laboratory (ESL), EPFL, Switzerland"],"affiliations":[{"raw_affiliation_string":"Embedded Systems Laboratory (ESL), EPFL, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050801793","display_name":"Marina Zapater","orcid":"https://orcid.org/0000-0002-6971-1965"},"institutions":[{"id":"https://openalex.org/I173439891","display_name":"HES-SO University of Applied Sciences and Arts Western Switzerland","ror":"https://ror.org/01xkakk17","country_code":"CH","type":"education","lineage":["https://openalex.org/I173439891"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Marina Zapater","raw_affiliation_strings":["HES-SO, Switzerland"],"affiliations":[{"raw_affiliation_string":"HES-SO, Switzerland","institution_ids":["https://openalex.org/I173439891"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044467469","display_name":"Giovanni Ansaloni","orcid":"https://orcid.org/0000-0002-8940-3775"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Giovanni Ansaloni","raw_affiliation_strings":["Embedded Systems Laboratory (ESL), EPFL, Switzerland"],"affiliations":[{"raw_affiliation_string":"Embedded Systems Laboratory (ESL), EPFL, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074236306","display_name":"David Atienza","orcid":"https://orcid.org/0000-0001-9536-4947"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"David Atienza","raw_affiliation_strings":["Embedded Systems Laboratory (ESL), EPFL, Switzerland"],"affiliations":[{"raw_affiliation_string":"Embedded Systems Laboratory (ESL), EPFL, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"fulltext_origin":"pdf","cited_by_count":0,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":0,"max":60},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.632501},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.62239456},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.5429336},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.53096926},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.46416974},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39978188},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.32551008},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.32085207}],"mesh":[],"locations_count":2,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/lascas53948.2022.9893905","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},{"is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/294840","pdf_url":"https://infoscience.epfl.ch/record/294840/files/Full%20System%20Exploration%20of%20On-Chip%20Wireless%20Communication%20on%20Many-Core%20Architectures.pdf","source":{"id":"https://openalex.org/S4306400488","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false}],"best_oa_location":{"is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/294840","pdf_url":"https://infoscience.epfl.ch/record/294840/files/Full%20System%20Exploration%20of%20On-Chip%20Wireless%20Communication%20on%20Many-Core%20Architectures.pdf","source":{"id":"https://openalex.org/S4306400488","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.68}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":11,"referenced_works":["https://openalex.org/W2065914858","https://openalex.org/W2108564112","https://openalex.org/W2126475076","https://openalex.org/W2147657366","https://openalex.org/W2618530766","https://openalex.org/W2925548206","https://openalex.org/W3083505238","https://openalex.org/W3118608800","https://openalex.org/W3161571687","https://openalex.org/W4234251156","https://openalex.org/W4292169167"],"related_works":["https://openalex.org/W4292904049","https://openalex.org/W3142211975","https://openalex.org/W3131627289","https://openalex.org/W2136854845","https://openalex.org/W2130914040","https://openalex.org/W2119122672","https://openalex.org/W2065289416","https://openalex.org/W2018912978","https://openalex.org/W2017236304","https://openalex.org/W1879443270"],"abstract_inverted_index":{"In":[0,31],"order":[1],"to":[2,64,92],"develop":[3],"sustainable":[4],"and":[5,26,79,121],"more":[6],"powerful":[7],"information":[8],"technology":[9],"(IT)":[10],"infrastructures,":[11],"the":[12,16,22,37,55,66,93,100,113],"challenges":[13],"posed":[14],"by":[15,134],"\"memory":[17],"wall\"":[18],"are":[19],"critical":[20],"for":[21,54],"design":[23],"of":[24,39,57,68,102,116,119,164],"high-performance":[25],"high-efficiency":[27],"many-core":[28,58,103],"computing":[29],"systems.":[30],"this":[32,83,86],"context,":[33],"recent":[34],"advances":[35],"in":[36,85],"integration":[38],"nano-antennas,":[40],"enabling":[41,99],"novel":[42],"short-distance":[43],"communication":[44,70,160],"paradigms,":[45],"promise":[46],"disruptive":[47],"gains.":[48],"To":[49,82],"gauge":[50],"their":[51],"potential":[52],"benefit":[53],"next-generation":[56],"server":[59],"designs,":[60],"it":[61],"is":[62,155],"crucial":[63],"explore":[65],"impact":[67],"wireless":[69,107,120,159],"links":[71],"from":[72],"a":[73,140],"whole-system":[74],"viewpoint,":[75],"considering":[76],"complex":[77],"architectures":[78],"applications":[80],"characteristics.":[81],"end,":[84],"work":[87],"we":[88],"introduce":[89],"an":[90,136,147],"extension":[91,111],"popular":[94],"gem5":[95],"full":[96],"system-level":[97],"simulator,":[98],"simulation":[101],"platforms":[104],"featuring":[105],"on-chip":[106,166],"channels.":[108],"This":[109],"new":[110],"allows":[112],"flexible":[114],"investigation":[115],"different":[117],"combinations":[118],"wired":[122,167],"interconnects,":[123],"as":[124,126],"well":[125],"diverse":[127],"connection":[128],"protocols.":[129],"We":[130],"showcase":[131],"its":[132],"capabilities":[133],"performing":[135],"architectural":[137],"exploration,":[138],"targeting":[139],"multi-core":[141],"system":[142],"executing":[143],"image":[144],"inference":[145],"using":[146],"AlexNet":[148],"Neural":[149],"Network":[150],"benchmark.":[151],"A":[152],"2.3x":[153],"speedup":[154],"obtained":[156],"when":[157],"implementing":[158],"between":[161],"cores":[162],"instead":[163],"traditional":[165],"interconnects.":[168]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W4296339345","counts_by_year":[],"updated_date":"2024-12-06T07:07:04.829812","created_date":"2022-09-20"}