{"id":"https://openalex.org/W2010574112","doi":"https://doi.org/10.1109/l-ca.2012.8","title":"Compiler-assisted, selective out-of-order commit","display_name":"Compiler-assisted, selective out-of-order commit","publication_year":2012,"publication_date":"2012-05-24","ids":{"openalex":"https://openalex.org/W2010574112","doi":"https://doi.org/10.1109/l-ca.2012.8","mag":"2010574112"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/l-ca.2012.8","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060589952","display_name":"Nam Duong","orcid":"https://orcid.org/0009-0009-9634-2956"},"institutions":[{"id":"https://openalex.org/I204250578","display_name":"University of California, Irvine","ror":"https://ror.org/04gyf1771","country_code":"US","type":"education","lineage":["https://openalex.org/I204250578"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nam Duong","raw_affiliation_strings":["Department of Computer Science, University of California, Irvine, Irvine, CA, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of California, Irvine, Irvine, CA, USA#TAB#","institution_ids":["https://openalex.org/I204250578"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079080588","display_name":"Alex Veidenbaum","orcid":"https://orcid.org/0009-0004-0506-0050"},"institutions":[{"id":"https://openalex.org/I204250578","display_name":"University of California, Irvine","ror":"https://ror.org/04gyf1771","country_code":"US","type":"education","lineage":["https://openalex.org/I204250578"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Alex V. Veidenbaum","raw_affiliation_strings":["Department of Computer Science, University of California, Irvine, Irvine, CA, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of California, Irvine, Irvine, CA, USA#TAB#","institution_ids":["https://openalex.org/I204250578"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":6,"citation_normalized_percentile":{"value":0.696539,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":81,"max":82},"biblio":{"volume":"12","issue":"1","first_page":"21","last_page":"24"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9987,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9974,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/commit","display_name":"Commit","score":0.94753206},{"id":"https://openalex.org/keywords/out-of-order-execution","display_name":"Out-of-order execution","score":0.56378186},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.45129794}],"concepts":[{"id":"https://openalex.org/C153180980","wikidata":"https://www.wikidata.org/wiki/Q19776675","display_name":"Commit","level":2,"score":0.94753206},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8587499},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.7012386},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5923986},{"id":"https://openalex.org/C1793878","wikidata":"https://www.wikidata.org/wiki/Q1153762","display_name":"Out-of-order execution","level":2,"score":0.56378186},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.513054},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5099472},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.45159882},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.45129794},{"id":"https://openalex.org/C160403385","wikidata":"https://www.wikidata.org/wiki/Q220543","display_name":"Queue","level":2,"score":0.44986913},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.27295494},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.24409983},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.09790185},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0686771}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/l-ca.2012.8","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[],"grants":[],"datasets":[],"versions":[],"referenced_works_count":10,"referenced_works":["https://openalex.org/W2039088860","https://openalex.org/W2044206819","https://openalex.org/W2081956993","https://openalex.org/W2118859527","https://openalex.org/W2118896605","https://openalex.org/W2138351227","https://openalex.org/W2146655423","https://openalex.org/W2296408112","https://openalex.org/W4236345830","https://openalex.org/W4244763500"],"related_works":["https://openalex.org/W4367365664","https://openalex.org/W4293227618","https://openalex.org/W3155329745","https://openalex.org/W2800306259","https://openalex.org/W2735885410","https://openalex.org/W2622383771","https://openalex.org/W2296408112","https://openalex.org/W2010574112","https://openalex.org/W1982078374","https://openalex.org/W1862815127"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"an":[3,111],"out-of-order":[4,54],"instruction":[5,16,55,114],"commit":[6,20,30,41,56,65],"mechanism":[7],"using":[8],"a":[9,77,108],"novel":[10],"compiler/architecture":[11],"interface.":[12],"The":[13,64,104],"compiler":[14],"creates":[15],"\u201cblocks\u201d":[17],"guaranteeing":[18],"some":[19],"conditions":[21],"and":[22,52,59,127],"the":[23,26,39,48],"processor":[24,51,79],"uses":[25],"block":[27],"information":[28],"to":[29,94,121],"certain":[31],"instructions":[32,85],"out":[33,88],"of":[34,47,89,110],"order.":[35],"Micro-architectural":[36],"support":[37],"for":[38,76,124],"new":[40],"mode":[42,66],"is":[43,107],"made":[44],"on":[45,82],"top":[46],"standard,":[49],"ROB-based":[50],"includes":[53],"with":[57,100],"register":[58],"load":[60],"queue":[61],"entry":[62],"release.":[63],"may":[67],"be":[68,122],"switched":[69],"multiple":[70],"times":[71],"during":[72],"execution.":[73],"Initial":[74],"results":[75],"4-wide":[78],"show":[80],"that,":[81],"average,":[83],"52%":[84],"are":[86],"committed":[87],"order":[90],"resulting":[91],"in":[92],"10%":[93],"26%":[95],"speedups":[96],"over":[97],"in-order":[98],"commit,":[99],"minimal":[101],"hardware":[102],"overhead.":[103],"performance":[105],"improvement":[106],"result":[109],"effectively":[112],"larger":[113],"window":[115],"that":[116],"allows":[117],"more":[118],"cache":[119],"misses":[120],"overlapped":[123],"both":[125],"L1":[126],"L2":[128],"caches.":[129]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2010574112","counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":3}],"updated_date":"2024-12-12T09:57:13.433813","created_date":"2016-06-24"}