{"id":"https://openalex.org/W2913630574","doi":"https://doi.org/10.1109/jssc.2019.2893513","title":"A Low-Jitter Injection-Locked Multi-Frequency Generator Using Digitally Controlled Oscillators and Time-Interleaved Calibration","display_name":"A Low-Jitter Injection-Locked Multi-Frequency Generator Using Digitally Controlled Oscillators and Time-Interleaved Calibration","publication_year":2019,"publication_date":"2019-02-09","ids":{"openalex":"https://openalex.org/W2913630574","doi":"https://doi.org/10.1109/jssc.2019.2893513","mag":"2913630574"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2019.2893513","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_indexed_in_scopus":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5021596926","display_name":"Heein Yoon","orcid":"https://orcid.org/0000-0002-2947-6999"},"institutions":[{"id":"https://openalex.org/I48566637","display_name":"Ulsan National Institute of Science and Technology","ror":"https://ror.org/017cjz748","country_code":"KR","type":"funder","lineage":["https://openalex.org/I48566637"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Heein Yoon","raw_affiliation_strings":["School of Electrical and Computer Engineering, lsan National Institute of Science and Technology, Ulsan, South Korea"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, lsan National Institute of Science and Technology, Ulsan, South Korea","institution_ids":["https://openalex.org/I48566637"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083598290","display_name":"Suneui Park","orcid":"https://orcid.org/0000-0001-5399-1782"},"institutions":[{"id":"https://openalex.org/I48566637","display_name":"Ulsan National Institute of Science and Technology","ror":"https://ror.org/017cjz748","country_code":"KR","type":"funder","lineage":["https://openalex.org/I48566637"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Suneui Park","raw_affiliation_strings":["School of Electrical and Computer Engineering, lsan National Institute of Science and Technology, Ulsan, South Korea"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, lsan National Institute of Science and Technology, Ulsan, South Korea","institution_ids":["https://openalex.org/I48566637"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5004599468","display_name":"Jaehyouk Choi","orcid":"https://orcid.org/0000-0002-3055-8684"},"institutions":[{"id":"https://openalex.org/I48566637","display_name":"Ulsan National Institute of Science and Technology","ror":"https://ror.org/017cjz748","country_code":"KR","type":"funder","lineage":["https://openalex.org/I48566637"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jaehyouk Choi","raw_affiliation_strings":["School of Electrical and Computer Engineering, lsan National Institute of Science and Technology, Ulsan, South Korea"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, lsan National Institute of Science and Technology, Ulsan, South Korea","institution_ids":["https://openalex.org/I48566637"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.912,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":12,"citation_normalized_percentile":{"value":0.691534,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":87,"max":88},"biblio":{"volume":"54","issue":"6","first_page":"1564","last_page":"1574"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dbc","display_name":"dBc","score":0.66723955},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.49708036},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.43537045}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.9134091},{"id":"https://openalex.org/C193523891","wikidata":"https://www.wikidata.org/wiki/Q1771950","display_name":"dBc","level":3,"score":0.66723955},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.61905754},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5747911},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.49708036},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.4967454},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.48856363},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.48462304},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.46452224},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.43537045},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.40164196},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.39546564},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36268017},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.33920148},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3375758},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16344684},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.069461286},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2019.2893513","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_indexed_in_scopus":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.89,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"grants":[{"funder":"https://openalex.org/F4320332195","funder_display_name":"Samsung","award_id":"SRFC-IT1702-02"}],"datasets":[],"versions":[],"referenced_works_count":30,"referenced_works":["https://openalex.org/W1669302834","https://openalex.org/W1873805548","https://openalex.org/W1948778041","https://openalex.org/W1975693956","https://openalex.org/W1987712409","https://openalex.org/W2016167819","https://openalex.org/W2017027686","https://openalex.org/W2018037110","https://openalex.org/W2019647239","https://openalex.org/W2020188262","https://openalex.org/W2037381402","https://openalex.org/W2043037338","https://openalex.org/W2044141477","https://openalex.org/W2069335439","https://openalex.org/W2090963250","https://openalex.org/W2097653958","https://openalex.org/W2108488258","https://openalex.org/W2121854746","https://openalex.org/W2125582658","https://openalex.org/W2125911467","https://openalex.org/W2166686159","https://openalex.org/W2177383565","https://openalex.org/W2277964521","https://openalex.org/W2462522525","https://openalex.org/W2560680290","https://openalex.org/W2754812974","https://openalex.org/W2760594917","https://openalex.org/W2780527437","https://openalex.org/W2792678133","https://openalex.org/W2801331088"],"related_works":["https://openalex.org/W4286579627","https://openalex.org/W4281672152","https://openalex.org/W3189810088","https://openalex.org/W272184114","https://openalex.org/W2540832666","https://openalex.org/W2394282069","https://openalex.org/W2141726610","https://openalex.org/W2139484866","https://openalex.org/W2117747481","https://openalex.org/W1851259350"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,73,95],"low-jitter,":[4],"injection-locked":[5,16,56],"frequency":[6,47],"generator":[7,79],"that":[8,26,49],"can":[9,21,30],"provide":[10],"multiple":[11],"output":[12,28,88,117,159],"frequencies":[13,29],"concurrently.":[14],"The":[15,99,126,137],"digitally":[17],"controlled":[18,23,87],"oscillators":[19],"(DCOs)":[20],"be":[22,31],"separately":[24],"so":[25],"their":[27],"changed":[32],"independently":[33,86],"between":[34],"0.9":[35],"and":[36,68,90,103,122,147],"1.2":[37],"GHz":[38],"in":[39,52,94],"15-MHz":[40],"steps.":[41],"Due":[42],"to":[43,60,83,111,133],"the":[44,53,75,104,115,148],"proposed":[45,76],"time-interleaved":[46],"calibrator":[48],"operates":[50],"continuously":[51],"background,":[54],"all":[55],"DCOs":[57],"are":[58],"ensured":[59],"maintain":[61],"excellent":[62],"jitter":[63,106,130],"performance":[64],"against":[65],"process,":[66],"voltage,":[67],"temperature":[69],"(PVT)":[70],"variations.":[71],"As":[72],"prototype,":[74],"injection-locked,":[77],"multi-frequency":[78],"(ILMFG)":[80],"was":[81,92,131,140,152],"designed":[82],"generate":[84],"two":[85,157],"signals,":[89],"it":[91],"fabricated":[93],"65-nm":[96],"CMOS":[97],"technology.":[98],"1-MHz":[100],"phase":[101],"noise":[102],"rms":[105,129],"integrated":[107],"from":[108],"1":[109],"kHz":[110],"40":[112],"MHz":[113],"of":[114,128],"960-MHz":[116],"signal":[118],"were":[119],"-133.5":[120],"dBc/Hz":[121],"375":[123],"fs,":[124],"respectively.":[125],"degradation":[127],"restricted":[132],"less":[134],"than":[135],"10%.":[136],"silicon":[138],"area":[139],"0.05":[141],"mm":[142],"2":[145],",":[146],"total":[149],"power":[150],"consumption":[151],"7.7":[153],"mW":[154],"when":[155],"generating":[156],"different":[158],"frequencies.":[160]},"abstract_inverted_index_v3":null,"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2913630574","counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":5},{"year":2019,"cited_by_count":1}],"updated_date":"2025-03-21T10:38:00.825050","created_date":"2019-02-21"}