{"id":"https://openalex.org/W2021797032","doi":"https://doi.org/10.1109/jssc.2012.2192661","title":"Low Store Energy, Low VDDmin, 8T2R Nonvolatile Latch and SRAM With Vertical-Stacked Resistive Memory (Memristor) Devices for Low Power Mobile Applications","display_name":"Low Store Energy, Low VDDmin, 8T2R Nonvolatile Latch and SRAM With Vertical-Stacked Resistive Memory (Memristor) Devices for Low Power Mobile Applications","publication_year":2012,"publication_date":"2012-05-24","ids":{"openalex":"https://openalex.org/W2021797032","doi":"https://doi.org/10.1109/jssc.2012.2192661","mag":"2021797032"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2012.2192661","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023301745","display_name":"Pi-Feng Chiu","orcid":"https://orcid.org/0000-0001-6665-3555"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Pi-Feng Chiu","raw_affiliation_strings":["Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"affiliations":[{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023225287","display_name":"Meng\u2010Fan Chang","orcid":"https://orcid.org/0000-0001-6905-6350"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Meng-Fan Chang","raw_affiliation_strings":["Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"affiliations":[{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109238172","display_name":"Che-Wei Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Che-Wei Wu","raw_affiliation_strings":["Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"affiliations":[{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103552195","display_name":"Ching-Hao Chuang","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ching-Hao Chuang","raw_affiliation_strings":["Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"affiliations":[{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112150802","display_name":"Shyh-Shyuan Sheu","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shyh-Shyuan Sheu","raw_affiliation_strings":["Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"affiliations":[{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100736720","display_name":"Yu\u2010Sheng Chen","orcid":"https://orcid.org/0000-0001-6593-5155"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yu-Sheng Chen","raw_affiliation_strings":["Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"affiliations":[{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108417335","display_name":"Ming\u2010Jinn Tsai","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ming-Jinn Tsai","raw_affiliation_strings":["Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#"],"affiliations":[{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan#TAB#","institution_ids":["https://openalex.org/I25846049"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":6.651,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":149,"citation_normalized_percentile":{"value":0.941451,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":98,"max":99},"biblio":{"volume":"47","issue":"6","first_page":"1483","last_page":"1496"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-Volatile Memory","score":0.7455505},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.7420358},{"id":"https://openalex.org/keywords/non-volatile-random-access-memory","display_name":"Non-volatile random-access memory","score":0.5510594},{"id":"https://openalex.org/keywords/memistor","display_name":"Memistor","score":0.52430236},{"id":"https://openalex.org/keywords/standby-power","display_name":"Standby power","score":0.4960843},{"id":"https://openalex.org/keywords/memory-cell","display_name":"Memory cell","score":0.48595035},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.47366032}],"concepts":[{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.7455505},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.7420358},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7191822},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.6990384},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5707767},{"id":"https://openalex.org/C34172316","wikidata":"https://www.wikidata.org/wiki/Q499024","display_name":"Non-volatile random-access memory","level":5,"score":0.5510594},{"id":"https://openalex.org/C1895703","wikidata":"https://www.wikidata.org/wiki/Q6034938","display_name":"Memistor","level":4,"score":0.52430236},{"id":"https://openalex.org/C7140552","wikidata":"https://www.wikidata.org/wiki/Q1366402","display_name":"Standby power","level":3,"score":0.4960843},{"id":"https://openalex.org/C2776638159","wikidata":"https://www.wikidata.org/wiki/Q18343761","display_name":"Memory cell","level":4,"score":0.48595035},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.47366032},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.46146896},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.45561016},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.43206245},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.37936783},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.35029292},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.33324212},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.26472944},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.2188679},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14371595},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/jssc.2012.2192661","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.91}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":52,"referenced_works":["https://openalex.org/W1487036033","https://openalex.org/W1549725729","https://openalex.org/W1811048333","https://openalex.org/W2002038549","https://openalex.org/W2002612140","https://openalex.org/W2004369723","https://openalex.org/W2007300900","https://openalex.org/W2008904077","https://openalex.org/W2009511314","https://openalex.org/W2017195664","https://openalex.org/W2031948068","https://openalex.org/W2032091965","https://openalex.org/W2041727850","https://openalex.org/W2051736202","https://openalex.org/W2055175665","https://openalex.org/W2067168777","https://openalex.org/W2078304630","https://openalex.org/W2080779002","https://openalex.org/W2084129114","https://openalex.org/W2091927724","https://openalex.org/W2095913060","https://openalex.org/W2098931949","https://openalex.org/W2102900407","https://openalex.org/W2105408739","https://openalex.org/W2105940973","https://openalex.org/W2115598106","https://openalex.org/W2119520935","https://openalex.org/W2133079932","https://openalex.org/W2136393784","https://openalex.org/W2137177817","https://openalex.org/W2137459077","https://openalex.org/W2140998568","https://openalex.org/W2141740753","https://openalex.org/W2145962596","https://openalex.org/W2147503459","https://openalex.org/W2151395718","https://openalex.org/W2153605212","https://openalex.org/W2158732782","https://openalex.org/W2162141012","https://openalex.org/W2162651880","https://openalex.org/W2163031927","https://openalex.org/W2164330002","https://openalex.org/W2165261792","https://openalex.org/W2165310699","https://openalex.org/W2168972302","https://openalex.org/W2539500217","https://openalex.org/W2546250013","https://openalex.org/W2567600075","https://openalex.org/W2788104796","https://openalex.org/W3142098508","https://openalex.org/W3143137288","https://openalex.org/W3150512006"],"related_works":["https://openalex.org/W3134061447","https://openalex.org/W2737385822","https://openalex.org/W2593849346","https://openalex.org/W2543577874","https://openalex.org/W2534660380","https://openalex.org/W2181574781","https://openalex.org/W2149441930","https://openalex.org/W2146569998","https://openalex.org/W1567000137","https://openalex.org/W1494152240"],"abstract_inverted_index":{"Many":[0],"mobile":[1],"SoC":[2],"chips":[3],"employ":[4],"a":[5,75,98,119],"\"two-macro\"":[6],"approach":[7,36],"including":[8],"volatile":[9,51],"and":[10,16,52,62,97,118,128,174],"nonvolatile":[11,30,53,80,104,162,181],"memory":[12,77],"macros":[13],"(i.e.":[14],"SRAM":[15,81,129,182],"Flash),":[17],"to":[18,43,67,86,140,146],"achieve":[19,87],"high-performance":[20],"or":[21,183],"low-voltage":[22],"power-on":[23],"operation":[24],"with":[25],"the":[26,34,50,64,116,137,156,170],"capability":[27],"of":[28,47,179],"power-off":[29],"data":[31,48],"storage.":[32],"However,":[33],"two-macro":[35,184],"suffers":[37],"from":[38],"slow":[39],"store/restore":[40,56,91,94],"speeds":[41,57],"due":[42],"word-by-word":[44],"serial":[45],"transfer":[46],"between":[49],"memories.":[54],"Slow":[55],"require":[58],"long":[59],"power-on/off":[60],"time":[61],"leave":[63],"device":[65],"vulnerable":[66],"sudden":[68],"power":[69],"failure":[70,149],".":[71],"This":[72,102,164],"study":[73],"proposes":[74],"resistive":[76,103],"(memristor)":[78],"based":[79],"(or":[82,160],"memristor":[83,111,126],"latch)":[84],"cell":[85,100,107,139],"fast":[88],"bit-to-bit":[89],"parallel":[90],"operations,":[92],"low":[93],"energy":[95,173],"consumption,":[96],"compact":[99],"area.":[101],"8T2R":[105],"(Rnv8T)":[106],"includes":[108],"two":[109],"fast-write":[110],"(RRAM)":[112],"devices":[113],"vertical-stacked":[114],"over":[115],"8T,":[117],"novel":[120],"2T":[121],"memristor-switch,":[122],"which":[123],"provides":[124],"both":[125],"control":[127],"write-assist":[130],"functions.":[131],"The":[132],"write":[133],"assist":[134],"feature":[135],"enables":[136],"Rnv8T":[138,167],"use":[141],"read":[142],"favored":[143],"transistor":[144],"sizing":[145],"prevent":[147],"read/write":[148],"at":[150],"lower":[151],"VDDs.":[152],"We":[153],"also":[154],"fabricated":[155],"first":[157],"macro-level":[158],"memristor-based":[159],"RRAM-based)":[161],"SRAM.":[163],"16":[165],"Kb":[166],"macro":[168],"achieved":[169],"lowest":[171],"store":[172],"R/W":[175],"VDDmin":[176],"(0.45":[177],"V)":[178],"any":[180],"solution.":[185]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2021797032","counts_by_year":[{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":19},{"year":2022,"cited_by_count":14},{"year":2021,"cited_by_count":14},{"year":2020,"cited_by_count":5},{"year":2019,"cited_by_count":16},{"year":2018,"cited_by_count":11},{"year":2017,"cited_by_count":16},{"year":2016,"cited_by_count":14},{"year":2015,"cited_by_count":14},{"year":2014,"cited_by_count":15},{"year":2013,"cited_by_count":6}],"updated_date":"2025-01-06T06:05:52.181482","created_date":"2016-06-24"}