乐胖代购免代理版

{"id":"https://openalex.org/W2138568360","doi":"https://doi.org/10.1109/isqed.2008.4479784","title":"Predictive Delay Evaluation on Emerging CMOS Technologies: A Simulation Framework","display_name":"Predictive Delay Evaluation on Emerging CMOS Technologies: A Simulation Framework","publication_year":2008,"publication_date":"2008-03-01","ids":{"openalex":"https://openalex.org/W2138568360","doi":"https://doi.org/10.1109/isqed.2008.4479784","mag":"2138568360"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2008.4479784","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5071367521","display_name":"Manuel Sellier","orcid":null},"institutions":[{"id":"https://openalex.org/I4210094169","display_name":"STMicroelectronics (India)","ror":"https://ror.org/00ft7bw25","country_code":"IN","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210094169"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Manuel Sellier","raw_affiliation_strings":["STMicroelectron., Crolles"],"affiliations":[{"raw_affiliation_string":"STMicroelectron., Crolles","institution_ids":["https://openalex.org/I4210094169"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032162752","display_name":"Jean\u2010Michel Portal","orcid":"https://orcid.org/0000-0002-6722-053X"},"institutions":[],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Jean-Michel Portal","raw_affiliation_strings":["[L2MP, Marseilles, France]"],"affiliations":[{"raw_affiliation_string":"[L2MP, Marseilles, France]","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083619989","display_name":"B. Borot","orcid":null},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Bertrand Borot","raw_affiliation_strings":["[STMicroelectronics Crolles France]"],"affiliations":[{"raw_affiliation_string":"[STMicroelectronics Crolles France]","institution_ids":["https://openalex.org/I131827901"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048235024","display_name":"Steve Colquhoun","orcid":null},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Steve Colquhoun","raw_affiliation_strings":["[STMicroelectronics Crolles France]"],"affiliations":[{"raw_affiliation_string":"[STMicroelectronics Crolles France]","institution_ids":["https://openalex.org/I131827901"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026258252","display_name":"Richard Ferrant","orcid":null},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Richard Ferrant","raw_affiliation_strings":["[STMicroelectronics Crolles France]"],"affiliations":[{"raw_affiliation_string":"[STMicroelectronics Crolles France]","institution_ids":["https://openalex.org/I131827901"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5106940391","display_name":"Fr Boeuf","orcid":null},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Fr Boeuf","raw_affiliation_strings":["[STMicroelectronics Crolles France]"],"affiliations":[{"raw_affiliation_string":"[STMicroelectronics Crolles France]","institution_ids":["https://openalex.org/I131827901"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109958272","display_name":"A. Farcy","orcid":null},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Alexis Farcy","raw_affiliation_strings":["[STMicroelectronics Crolles France]"],"affiliations":[{"raw_affiliation_string":"[STMicroelectronics Crolles France]","institution_ids":["https://openalex.org/I131827901"]}]}],"institution_assertions":[],"countries_distinct_count":3,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.603,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":5,"citation_normalized_percentile":{"value":0.544423,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":78,"max":80},"biblio":{"volume":null,"issue":null,"first_page":"492","last_page":"497"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.8927939},{"id":"https://openalex.org/keywords/semiconductor-device-modeling","display_name":"Semiconductor device modeling","score":0.4465317}],"concepts":[{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.8927939},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.75451547},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.690751},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.64523715},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5223026},{"id":"https://openalex.org/C4775677","wikidata":"https://www.wikidata.org/wiki/Q7449393","display_name":"Semiconductor device modeling","level":3,"score":0.4465317},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17234701},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.16955552}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2008.4479784","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5,"id":"https://metadata.un.org/sdg/9"}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":6,"referenced_works":["https://openalex.org/W1967640700","https://openalex.org/W2090494208","https://openalex.org/W2097978554","https://openalex.org/W2117980170","https://openalex.org/W2135409859","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2945285759","https://openalex.org/W2610849239","https://openalex.org/W2360388749","https://openalex.org/W2144789955","https://openalex.org/W2109445684","https://openalex.org/W2088504085","https://openalex.org/W2081082331","https://openalex.org/W2041608016","https://openalex.org/W2037642033","https://openalex.org/W1674491244"],"abstract_inverted_index":{"The":[0,44,57,68],"main":[1],"goal":[2],"of":[3,82],"this":[4,25],"paper":[5],"is":[6,49,61],"to":[7,103],"study":[8],"the":[9,73,80,85],"delay":[10,59,107],"evolution":[11],"for":[12,38,41,84],"future":[13],"technology":[14],"nodes":[15],"(32nm":[16],"and":[17,40,51,94],"beyond)":[18],"using":[19],"electrical":[20],"circuit":[21],"predictive":[22,29,45,58],"simulations.":[23,67],"With":[24],"aim,":[26],"two":[27],"SPICE":[28],"models,":[30],"directly":[31],"based":[32],"on":[33],"ITRS":[34],"data,":[35],"are":[36],"developed":[37],"devices":[39],"interconnect":[42,65,75],"respectively.":[43],"spice":[46],"models":[47],"generation":[48],"presented":[50],"validated":[52],"versus":[53],"45nm":[54],"silicon":[55],"data.":[56],"evaluation":[60],"performed":[62],"with":[63],"buffered":[64],"lines":[66],"simulation":[69],"results":[70],"show":[71],"that":[72],"critical":[74],"length":[76],"should":[77],"be":[78,101],"in":[79,89],"order":[81],"10\u03bcm":[83],"2020":[86],"generation.":[87],"Moreover,":[88],"forthcoming":[90],"technologies,":[91],"driver":[92],"resizing":[93],"systematic":[95],"buffer":[96],"insertion":[97],"will":[98],"no":[99],"longer":[100],"sufficient":[102],"systematically":[104],"limit":[105],"wire":[106],"increase.":[108]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2138568360","counts_by_year":[{"year":2017,"cited_by_count":1}],"updated_date":"2024-12-10T09:27:54.216082","created_date":"2016-06-24"}