乐胖代购免代理版

{"id":"https://openalex.org/W2507898583","doi":"https://doi.org/10.1109/iscas.2016.7527508","title":"Neuromorphic computing with hybrid memristive/CMOS synapses for real-time learning","display_name":"Neuromorphic computing with hybrid memristive/CMOS synapses for real-time learning","publication_year":2016,"publication_date":"2016-05-01","ids":{"openalex":"https://openalex.org/W2507898583","doi":"https://doi.org/10.1109/iscas.2016.7527508","mag":"2507898583"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2016.7527508","pdf_url":null,"source":{"id":"https://openalex.org/S4363604393","display_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5054173368","display_name":"Daniele Ielmini","orcid":"https://orcid.org/0000-0002-1853-1614"},"institutions":[{"id":"https://openalex.org/I4210142020","display_name":"Consorzio di Bioingegneria e Informatica Medica","ror":"https://ror.org/044w95594","country_code":"IT","type":"other","lineage":["https://openalex.org/I4210142020"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"D. Ielmini","raw_affiliation_strings":["Dipartimento di Elettronica, Informazione e Bioingegneria, IU.NET, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informazione e Bioingegneria, IU.NET, Milano, Italy","institution_ids":["https://openalex.org/I4210142020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028455655","display_name":"Stefano Ambrogio","orcid":"https://orcid.org/0000-0002-5475-4209"},"institutions":[{"id":"https://openalex.org/I4210142020","display_name":"Consorzio di Bioingegneria e Informatica Medica","ror":"https://ror.org/044w95594","country_code":"IT","type":"other","lineage":["https://openalex.org/I4210142020"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"S. Ambrogio","raw_affiliation_strings":["Dipartimento di Elettronica, Informazione e Bioingegneria, IU.NET, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informazione e Bioingegneria, IU.NET, Milano, Italy","institution_ids":["https://openalex.org/I4210142020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007124999","display_name":"Valerio Milo","orcid":"https://orcid.org/0000-0002-3305-2742"},"institutions":[{"id":"https://openalex.org/I4210142020","display_name":"Consorzio di Bioingegneria e Informatica Medica","ror":"https://ror.org/044w95594","country_code":"IT","type":"other","lineage":["https://openalex.org/I4210142020"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"V. Milo","raw_affiliation_strings":["Dipartimento di Elettronica, Informazione e Bioingegneria, IU.NET, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informazione e Bioingegneria, IU.NET, Milano, Italy","institution_ids":["https://openalex.org/I4210142020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067285224","display_name":"Simone Balatti","orcid":null},"institutions":[{"id":"https://openalex.org/I4210142020","display_name":"Consorzio di Bioingegneria e Informatica Medica","ror":"https://ror.org/044w95594","country_code":"IT","type":"other","lineage":["https://openalex.org/I4210142020"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"S. Balatti","raw_affiliation_strings":["Dipartimento di Elettronica, Informazione e Bioingegneria, IU.NET, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informazione e Bioingegneria, IU.NET, Milano, Italy","institution_ids":["https://openalex.org/I4210142020"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101479332","display_name":"Zhongqiang Wang","orcid":"https://orcid.org/0000-0002-1133-6058"},"institutions":[{"id":"https://openalex.org/I4210142020","display_name":"Consorzio di Bioingegneria e Informatica Medica","ror":"https://ror.org/044w95594","country_code":"IT","type":"other","lineage":["https://openalex.org/I4210142020"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Z.-Q. Wang","raw_affiliation_strings":["Dipartimento di Elettronica, Informazione e Bioingegneria, IU.NET, Milano, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informazione e Bioingegneria, IU.NET, Milano, Italy","institution_ids":["https://openalex.org/I4210142020"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.704,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":10,"citation_normalized_percentile":{"value":0.858518,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":86,"max":87},"biblio":{"volume":null,"issue":null,"first_page":"1386","last_page":"1389"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12236","display_name":"Photoreceptor and optogenetics research","score":0.9973,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T11128","display_name":"Transition Metal Oxide Nanomaterials","score":0.9951,"subfield":{"id":"https://openalex.org/subfields/2507","display_name":"Polymers and Plastics"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.9353262},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.7139079},{"id":"https://openalex.org/keywords/phase-change-memory","display_name":"Phase-change memory","score":0.49899817},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-Volatile Memory","score":0.4759802}],"concepts":[{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.9353262},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.8223618},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.7139079},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.66208184},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5758538},{"id":"https://openalex.org/C80469333","wikidata":"https://www.wikidata.org/wiki/Q189088","display_name":"Von Neumann architecture","level":2,"score":0.5526599},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5112634},{"id":"https://openalex.org/C64142963","wikidata":"https://www.wikidata.org/wiki/Q1153902","display_name":"Phase-change memory","level":3,"score":0.49899817},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.4759802},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.44680655},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.43516862},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.29478148},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.28792247},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.27099973},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.25323343},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23238158},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.22573298},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.12949616},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.10389495},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2016.7527508","pdf_url":null,"source":{"id":"https://openalex.org/S4363604393","display_name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":16,"referenced_works":["https://openalex.org/W1810325903","https://openalex.org/W1928164400","https://openalex.org/W1974136515","https://openalex.org/W1982630937","https://openalex.org/W2004596214","https://openalex.org/W2016922062","https://openalex.org/W2025674646","https://openalex.org/W2030671441","https://openalex.org/W2032832574","https://openalex.org/W2108256115","https://openalex.org/W2120557145","https://openalex.org/W2147101007","https://openalex.org/W2152353207","https://openalex.org/W2171956063","https://openalex.org/W2297862270","https://openalex.org/W2334364695"],"related_works":["https://openalex.org/W4386475142","https://openalex.org/W4292697011","https://openalex.org/W3212508523","https://openalex.org/W3207218810","https://openalex.org/W2909534142","https://openalex.org/W2793181810","https://openalex.org/W2162174949","https://openalex.org/W2086672837","https://openalex.org/W1995352804","https://openalex.org/W1872623660"],"abstract_inverted_index":{"Resistive":[0],"(or":[1],"memristive)":[2],"devices,":[3],"including":[4],"resistive":[5,82],"switching":[6],"memory":[7,11,16,26],"(RRAM),":[8],"phase":[9],"change":[10],"(PCM)":[12],"an":[13],"spin-transfer":[14],"torque":[15],"(STTRAM),":[17],"are":[18],"strong":[19],"candidates":[20],"for":[21,43],"future":[22],"high-density":[23],"memory,":[24],"embedded":[25],"and":[27,55,67,115,122,130],"storage":[28],"class":[29],"memory.":[30],"The":[31,127],"availability":[32],"of":[33,80,118,124,133],"resistive-device":[34],"technology":[35],"in":[36,47,97],"the":[37,41,63,78,81,94,109,112,116,134],"industry":[38],"would":[39],"pave":[40],"way":[42],"several":[44],"other":[45,56],"applications":[46],"advanced":[48],"computing,":[49],"such":[50],"as":[51],"neuromorphic":[52],"cognitive":[53],"systems":[54],"non-von":[57],"Neumann":[58],"approaches":[59],"to":[60,71,75,86],"computing.":[61],"However,":[62],"building-block":[64],"design,":[65,111],"functionality":[66],"power":[68,131],"consumption":[69,132],"need":[70],"be":[72,139],"carefully":[73],"evaluated":[74],"assess":[76],"all":[77],"advantages":[79],"devices":[83],"with":[84],"respect":[85],"standard":[87],"CMOS":[88],"technology.":[89],"This":[90],"work":[91],"will":[92,138],"review":[93],"recent":[95],"progress":[96],"developing":[98],"hybrid":[99],"memristive/CMOS":[100],"synapses":[101],"based":[102],"on":[103],"either":[104],"RRAM":[105],"or":[106],"PCM,":[107],"showing":[108],"circuit":[110],"operation":[113],"concept":[114],"demonstration":[117],"real-time":[119],"spike-based":[120],"learning":[121,128],"recognition":[123],"visual":[125],"patterns.":[126],"accuracy":[129],"novel":[135],"synapse":[136],"blocks":[137],"finally":[140],"discussed.":[141]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2507898583","counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":3}],"updated_date":"2025-01-08T23:38:34.489477","created_date":"2016-09-16"}