{"id":"https://openalex.org/W2152710684","doi":"https://doi.org/10.1109/iscas.2011.5938096","title":"Evaluating on-chip interconnects for low operating frequency silicon neuron arrays","display_name":"Evaluating on-chip interconnects for low operating frequency silicon neuron arrays","publication_year":2011,"publication_date":"2011-05-01","ids":{"openalex":"https://openalex.org/W2152710684","doi":"https://doi.org/10.1109/iscas.2011.5938096","mag":"2152710684"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2011.5938096","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044024456","display_name":"Andrew Cassidy","orcid":"https://orcid.org/0000-0001-7305-4198"},"institutions":[{"id":"https://openalex.org/I145311948","display_name":"Johns Hopkins University","ror":"https://ror.org/00za53h95","country_code":"US","type":"education","lineage":["https://openalex.org/I145311948"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Andrew Cassidy","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Johns Hopkins University, Baltimore, MD, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Johns Hopkins University, Baltimore, MD, USA","institution_ids":["https://openalex.org/I145311948"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110504825","display_name":"Thomas G. Murray","orcid":null},"institutions":[{"id":"https://openalex.org/I145311948","display_name":"Johns Hopkins University","ror":"https://ror.org/00za53h95","country_code":"US","type":"education","lineage":["https://openalex.org/I145311948"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Thomas Murray","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Johns Hopkins University, Baltimore, MD, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Johns Hopkins University, Baltimore, MD, USA","institution_ids":["https://openalex.org/I145311948"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057789499","display_name":"Andreas G. Andreou","orcid":"https://orcid.org/0000-0003-3826-600X"},"institutions":[{"id":"https://openalex.org/I145311948","display_name":"Johns Hopkins University","ror":"https://ror.org/00za53h95","country_code":"US","type":"education","lineage":["https://openalex.org/I145311948"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Andreas G. Andreou","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Johns Hopkins University, Baltimore, MD, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Johns Hopkins University, Baltimore, MD, USA","institution_ids":["https://openalex.org/I145311948"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071857850","display_name":"Julius Georgiou","orcid":"https://orcid.org/0000-0002-7474-5449"},"institutions":[{"id":"https://openalex.org/I34771391","display_name":"University of Cyprus","ror":"https://ror.org/02qjrjx09","country_code":"CY","type":"education","lineage":["https://openalex.org/I34771391"]}],"countries":["CY"],"is_corresponding":false,"raw_author_name":"Julius Georgiou","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Cyprus, Nicosia, Cyprus"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Cyprus, Nicosia, Cyprus","institution_ids":["https://openalex.org/I34771391"]}]}],"institution_assertions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.093,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":6,"citation_normalized_percentile":{"value":0.792639,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":81,"max":82},"biblio":{"volume":null,"issue":null,"first_page":"2437","last_page":"2440"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9998,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9994,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/subthreshold-conduction","display_name":"Subthreshold conduction","score":0.66101503},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.4620307}],"concepts":[{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.66101503},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6506637},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6370208},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.597601},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5732394},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.51376617},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.46636376},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.4620307},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35970122},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.26385385},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.262918},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.19591027},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.15619248},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1459285},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14563021},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2011.5938096","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.55}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":16,"referenced_works":["https://openalex.org/W1991133733","https://openalex.org/W1995611942","https://openalex.org/W2017216250","https://openalex.org/W2068564784","https://openalex.org/W2103149211","https://openalex.org/W2105026894","https://openalex.org/W2107994122","https://openalex.org/W2114850813","https://openalex.org/W2133256259","https://openalex.org/W2142350238","https://openalex.org/W2147506855","https://openalex.org/W2152530926","https://openalex.org/W2154642802","https://openalex.org/W2163288878","https://openalex.org/W2978479175","https://openalex.org/W4302593574"],"related_works":["https://openalex.org/W4242937255","https://openalex.org/W2362169398","https://openalex.org/W2163915119","https://openalex.org/W2155827627","https://openalex.org/W2141748053","https://openalex.org/W2139353707","https://openalex.org/W2131019417","https://openalex.org/W2098218272","https://openalex.org/W2031051084","https://openalex.org/W1572837867"],"abstract_inverted_index":{"We":[0,70],"present":[1],"a":[2,73,80,106],"quantitative":[3],"analysis":[4,44],"of":[5,8,19,99],"the":[6,9,40,55,58,84,97],"limits":[7],"time-multiplexed":[10],"Address":[11],"Event":[12],"Representation":[13],"(AER)":[14],"bus":[15,62],"for":[16,92],"on-chip":[17],"connectivity":[18],"silicon":[20],"neuron":[21],"arrays.":[22,69],"In":[23],"particular,":[24],"we":[25],"evaluate":[26],"its":[27],"potential":[28],"to":[29,48,66],"support":[30],"high":[31],"density":[32],"and":[33],"low":[34,49],"power":[35],"neural":[36,68,109],"arrays":[37],"operating":[38,53],"in":[39,54,105],"subthreshold":[41,56],"regime.":[42],"Our":[43],"shows":[45],"that":[46,72,101],"due":[47],"clock":[50],"frequencies":[51],"when":[52],"regime,":[57],"traditional":[59],"single":[60,107],"AER":[61],"does":[63],"not":[64],"scale":[65],"large":[67],"find":[71],"switched":[74],"mesh":[75],"network":[76],"improves":[77],"scalability,":[78],"however,":[79],"crosspoint":[81],"architecture":[82],"overcomes":[83],"bandwidth":[85],"limitations":[86],"altogether.":[87],"By":[88],"trading":[89],"off":[90],"area":[91],"improved":[93],"performance,":[94],"it":[95],"increases":[96],"number":[98],"neurons":[100],"can":[102],"be":[103],"supported":[104],"chip":[108],"array.":[110]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2152710684","counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2024-12-11T00:52:11.885891","created_date":"2016-06-24"}