{"id":"https://openalex.org/W2169842719","doi":"https://doi.org/10.1109/iscas.2005.1465680","title":"Energy-saving Design Technique Achieved by Latched Pass-transistor Adiabatic Logic","display_name":"Energy-saving Design Technique Achieved by Latched Pass-transistor Adiabatic Logic","publication_year":2005,"publication_date":"2005-07-27","ids":{"openalex":"https://openalex.org/W2169842719","doi":"https://doi.org/10.1109/iscas.2005.1465680","mag":"2169842719"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465680","pdf_url":null,"source":{"id":"https://openalex.org/S4363604427","display_name":"1993 IEEE International Symposium on Circuits and Systems","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060963823","display_name":"Junyoung Park","orcid":"https://orcid.org/0000-0003-2603-1166"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"None Junyoung Park","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, Pohang University of Science and Technology, Pohang, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, Pohang University of Science and Technology, Pohang, South Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103538200","display_name":"Sung Je Hong","orcid":null},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"None Sung Je Hong","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, Pohang University of Science and Technology, Pohang, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, Pohang University of Science and Technology, Pohang, South Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100635272","display_name":"Jong Kim","orcid":"https://orcid.org/0000-0002-0484-0790"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"None Jong Kim","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, Pohang University of Science and Technology, Pohang, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, Pohang University of Science and Technology, Pohang, South Korea","institution_ids":["https://openalex.org/I123900574"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.86,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":19,"citation_normalized_percentile":{"value":0.859952,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":86,"max":87},"biblio":{"volume":null,"issue":null,"first_page":"4693","last_page":"4696"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9992,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.999,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adiabatic-circuit","display_name":"Adiabatic circuit","score":0.9678352},{"id":"https://openalex.org/keywords/pull-up-resistor","display_name":"Pull-up resistor","score":0.46093076},{"id":"https://openalex.org/keywords/resistor\u2013transistor-logic","display_name":"Resistor\u2013transistor logic","score":0.4413546},{"id":"https://openalex.org/keywords/integrated-injection-logic","display_name":"Integrated injection logic","score":0.42517024},{"id":"https://openalex.org/keywords/logic-level","display_name":"Logic level","score":0.42463356}],"concepts":[{"id":"https://openalex.org/C87606752","wikidata":"https://www.wikidata.org/wiki/Q4682637","display_name":"Adiabatic circuit","level":5,"score":0.9678352},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.79913867},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.6669329},{"id":"https://openalex.org/C109663097","wikidata":"https://www.wikidata.org/wiki/Q182453","display_name":"Adiabatic process","level":2,"score":0.6501081},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6053802},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6002872},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5509186},{"id":"https://openalex.org/C61818909","wikidata":"https://www.wikidata.org/wiki/Q1987617","display_name":"Pull-up resistor","level":5,"score":0.46093076},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4446924},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.44282874},{"id":"https://openalex.org/C180405849","wikidata":"https://www.wikidata.org/wiki/Q173464","display_name":"Resistor\u2013transistor logic","level":5,"score":0.4413546},{"id":"https://openalex.org/C159903706","wikidata":"https://www.wikidata.org/wiki/Q173574","display_name":"Integrated injection logic","level":5,"score":0.42517024},{"id":"https://openalex.org/C146569638","wikidata":"https://www.wikidata.org/wiki/Q173378","display_name":"Logic level","level":3,"score":0.42463356},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.42170322},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.41159514},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.36711204},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24930248},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.19164923},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1870457},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas.2005.1465680","pdf_url":null,"source":{"id":"https://openalex.org/S4363604427","display_name":"1993 IEEE International Symposium on Circuits and Systems","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":8,"referenced_works":["https://openalex.org/W1541478738","https://openalex.org/W2045383911","https://openalex.org/W2129878502","https://openalex.org/W2130751260","https://openalex.org/W2139266362","https://openalex.org/W2159680152","https://openalex.org/W2161486988","https://openalex.org/W2170191597"],"related_works":["https://openalex.org/W2965791759","https://openalex.org/W2580743037","https://openalex.org/W2562378116","https://openalex.org/W2554253794","https://openalex.org/W2178512053","https://openalex.org/W2152533674","https://openalex.org/W2108907112","https://openalex.org/W2099984297","https://openalex.org/W1889611132","https://openalex.org/W1485027372"],"abstract_inverted_index":{"In":[0,89,122],"recent":[1],"years,":[2],"low":[3,40,63,106],"power":[4,26,41,64,107,154],"circuit":[5,42,151],"design":[6,19,103],"has":[7,76],"been":[8,32,77],"an":[9,101],"important":[10],"issue":[11],"in":[12,39,153],"system":[13],"on":[14,79],"chip":[15],"(SoC)":[16],"and":[17,100],"VLSI":[18],"areas.":[20],"Adiabatic":[21],"logics,":[22,140],"which":[23],"dissipate":[24],"less":[25],"than":[27,116],"static":[28,55],"CMOS":[29,56,84,111],"logic,":[30],"have":[31],"introduced":[33],"as":[34],"a":[35,52,94,134],"promising":[36],"new":[37],"approach":[38],"design.":[43],"It":[44],"is":[45],"expected":[46],"that":[47,142,148],"adiabatic":[48,71,87,97,120,131,139],"logic":[49,57,72,98,132],"will":[50],"be":[51],"substitute":[53],"for":[54,59,82,105,137],"especially":[58],"the":[60,67,80,126,149],"purpose":[61],"of":[62,69,119,129,143,156],"applications.":[65,108],"Despite":[66],"proposal":[68],"several":[70],"families,":[73],"no":[74],"research":[75],"done":[78],"technique":[81],"replacing":[83],"circuits":[85],"with":[86,141],"logic.":[88,121],"this":[90],"paper,":[91],"we":[92,124],"propose":[93],"latched":[95],"pass-transistor":[96,130],"(LPAL)":[99],"energy-saving":[102],"scheme":[104],"LPAL":[109,150],"replaces":[110],"circuits,":[112],"providing":[113],"more":[114],"energy-efficiency":[115],"other":[117],"forms":[118],"simulation,":[123],"compared":[125],"energy":[127],"consumption":[128],"(PAL),":[133],"good":[135],"model":[136],"conventional":[138],"LPAL.":[144],"Simulation":[145],"results":[146,152],"show":[147],"savings":[155],"44%":[157],"over":[158],"PAL.":[159]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2169842719","counts_by_year":[{"year":2023,"cited_by_count":3},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":3},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2024-12-16T10:13:46.636375","created_date":"2016-06-24"}