{"id":"https://openalex.org/W2125707508","doi":"https://doi.org/10.1109/icecs.2006.379803","title":"Novel Current Sensing Circuit for IDDQ Testing","display_name":"Novel Current Sensing Circuit for IDDQ Testing","publication_year":2006,"publication_date":"2006-12-01","ids":{"openalex":"https://openalex.org/W2125707508","doi":"https://doi.org/10.1109/icecs.2006.379803","mag":"2125707508"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2006.379803","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037835559","display_name":"Jeong Beom Kim","orcid":"https://orcid.org/0000-0001-6230-8826"},"institutions":[{"id":"https://openalex.org/I165507594","display_name":"Kangwon National University","ror":"https://ror.org/01mh5ph17","country_code":"KR","type":"education","lineage":["https://openalex.org/I165507594"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Jeong Beom Kim","raw_affiliation_strings":["Department of Electronics Engineering, Kangwon National University, Chuncheon, Republic of Korea, Kimjb@kangwon.ac.kr"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, Kangwon National University, Chuncheon, Republic of Korea, Kimjb@kangwon.ac.kr","institution_ids":["https://openalex.org/I165507594"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5037835559"],"corresponding_institution_ids":["https://openalex.org/I165507594"],"apc_list":null,"apc_paid":null,"fwci":0.427,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":1,"citation_normalized_percentile":{"value":0.281789,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":61,"max":68},"biblio":{"volume":"3","issue":null,"first_page":"375","last_page":"378"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9992,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/iddq-testing","display_name":"Iddq testing","score":0.95228946}],"concepts":[{"id":"https://openalex.org/C206678392","wikidata":"https://www.wikidata.org/wiki/Q5987815","display_name":"Iddq testing","level":3,"score":0.95228946},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.6654598},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.63772976},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6246024},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5671253},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.55272293},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.51991004},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.49620587},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4312602},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.40831432},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.40783173},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.35354894},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3047731}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2006.379803","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.68}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":14,"referenced_works":["https://openalex.org/W1554885925","https://openalex.org/W1555575363","https://openalex.org/W162616246","https://openalex.org/W2102383741","https://openalex.org/W2110771569","https://openalex.org/W2111156521","https://openalex.org/W2127145135","https://openalex.org/W2130475334","https://openalex.org/W2139482572","https://openalex.org/W2143645707","https://openalex.org/W2156314197","https://openalex.org/W2156528602","https://openalex.org/W2165247086","https://openalex.org/W4302458519"],"related_works":["https://openalex.org/W3123985664","https://openalex.org/W2946329844","https://openalex.org/W2912670917","https://openalex.org/W2542635574","https://openalex.org/W2181536841","https://openalex.org/W2164017138","https://openalex.org/W2140747718","https://openalex.org/W2121399123","https://openalex.org/W188508038","https://openalex.org/W1549631873"],"abstract_inverted_index":{"This":[0,20],"paper":[1],"presents":[2],"a":[3,30,37,86],"new":[4],"current":[5,13,31],"monitoring":[6],"circuit":[7,21,35,45],"that":[8],"detects":[9],"faults":[10],"using":[11],"the":[12,41,44,75,89],"testing":[14],"technique":[15],"in":[16],"CMOS":[17,106],"integrated":[18],"circuits.":[19],"employs":[22],"cross-coupled":[23],"PMOS":[24],"transistors,":[25],"it":[26],"is":[27,36,92],"used":[28],"as":[29],"comparator.":[32],"The":[33,68,82,95],"proposed":[34],"negligible":[38],"impact":[39],"on":[40,78],"performance":[42],"of":[43,85],"under":[46],"test":[47],"(CUT).":[48],"In":[49],"addition,":[50],"no":[51],"extra":[52],"power":[53],"dissipation":[54],"and":[55,70],"high-speed":[56],"fault":[57],"detection":[58],"are":[59,72],"achieved.":[60],"It":[61],"can":[62],"be":[63],"applicable":[64],"deep":[65],"sub-micron":[66],"process.":[67,107],"validity":[69],"effectiveness":[71],"verified":[73],"through":[74],"HSPICE":[76],"simulation":[77],"circuits":[79],"with":[80,99],"faults.":[81],"area":[83],"overhead":[84],"BICS":[87],"versus":[88],"entire":[90],"chip":[91,96],"about":[93],"9.2%.":[94],"was":[97],"fabricated":[98],"Hynix":[100],"0.35":[101],"um":[102],"2-poly":[103],"4-metal":[104],"N-well":[105]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2125707508","counts_by_year":[],"updated_date":"2025-01-17T02:23:47.172483","created_date":"2016-06-24"}