乐胖代购免代理版

{"id":"https://openalex.org/W1916582918","doi":"https://doi.org/10.1109/iccd.1996.563559","title":"Microarchitecture support for reducing branch penalty in a superscaler processor","display_name":"Microarchitecture support for reducing branch penalty in a superscaler processor","publication_year":2002,"publication_date":"2002-12-24","ids":{"openalex":"https://openalex.org/W1916582918","doi":"https://doi.org/10.1109/iccd.1996.563559","mag":"1916582918"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.1996.563559","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077819649","display_name":"Maiko Sakamoto","orcid":"https://orcid.org/0000-0002-2299-0514"},"institutions":[{"id":"https://openalex.org/I4210133125","display_name":"Mitsubishi Electric (Japan)","ror":"https://ror.org/033y26782","country_code":"JP","type":"company","lineage":["https://openalex.org/I1306287861","https://openalex.org/I4210133125"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"M. Sakamoto","raw_affiliation_strings":["System LSI Laboratory, Mitsubishi Electric Corporation Limited, Itami, Hyogo, Japan"],"affiliations":[{"raw_affiliation_string":"System LSI Laboratory, Mitsubishi Electric Corporation Limited, Itami, Hyogo, Japan","institution_ids":["https://openalex.org/I4210133125"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067052913","display_name":"Yasuhiro Nunomura","orcid":null},"institutions":[{"id":"https://openalex.org/I4210133125","display_name":"Mitsubishi Electric (Japan)","ror":"https://ror.org/033y26782","country_code":"JP","type":"company","lineage":["https://openalex.org/I1306287861","https://openalex.org/I4210133125"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Y. Nunomura","raw_affiliation_strings":["System LSI Laboratory, Mitsubishi Electric Corporation Limited, Itami, Hyogo, Japan"],"affiliations":[{"raw_affiliation_string":"System LSI Laboratory, Mitsubishi Electric Corporation Limited, Itami, Hyogo, Japan","institution_ids":["https://openalex.org/I4210133125"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032137792","display_name":"Takeshi Yoshida","orcid":"https://orcid.org/0000-0002-4695-5377"},"institutions":[{"id":"https://openalex.org/I4210133125","display_name":"Mitsubishi Electric (Japan)","ror":"https://ror.org/033y26782","country_code":"JP","type":"company","lineage":["https://openalex.org/I1306287861","https://openalex.org/I4210133125"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Yoshida","raw_affiliation_strings":["System LSI Laboratory, Mitsubishi Electric Corporation Limited, Itami, Hyogo, Japan"],"affiliations":[{"raw_affiliation_string":"System LSI Laboratory, Mitsubishi Electric Corporation Limited, Itami, Hyogo, Japan","institution_ids":["https://openalex.org/I4210133125"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053624392","display_name":"Y. Shimazu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210133125","display_name":"Mitsubishi Electric (Japan)","ror":"https://ror.org/033y26782","country_code":"JP","type":"company","lineage":["https://openalex.org/I1306287861","https://openalex.org/I4210133125"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Y. Shimazu","raw_affiliation_strings":["System LSI Laboratory, Mitsubishi Electric Corporation Limited, Itami, Hyogo, Japan"],"affiliations":[{"raw_affiliation_string":"System LSI Laboratory, Mitsubishi Electric Corporation Limited, Itami, Hyogo, Japan","institution_ids":["https://openalex.org/I4210133125"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":0,"citation_normalized_percentile":{"value":0.0,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":0,"max":57},"biblio":{"volume":null,"issue":null,"first_page":"208","last_page":"216"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9956,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9944,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/branch-predictor","display_name":"Branch predictor","score":0.9767543},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.9159488},{"id":"https://openalex.org/keywords/superscalar","display_name":"Superscalar","score":0.83668256},{"id":"https://openalex.org/keywords/speculative-execution","display_name":"Speculative execution","score":0.65601724},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.61007214},{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.49112412},{"id":"https://openalex.org/keywords/out-of-order-execution","display_name":"Out-of-order execution","score":0.47749895},{"id":"https://openalex.org/keywords/subroutine","display_name":"Subroutine","score":0.41855788}],"concepts":[{"id":"https://openalex.org/C168522837","wikidata":"https://www.wikidata.org/wiki/Q679552","display_name":"Branch predictor","level":2,"score":0.9767543},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.9159488},{"id":"https://openalex.org/C147101560","wikidata":"https://www.wikidata.org/wiki/Q1045706","display_name":"Superscalar","level":2,"score":0.83668256},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.82360566},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.74759775},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.68213385},{"id":"https://openalex.org/C141331961","wikidata":"https://www.wikidata.org/wiki/Q2164465","display_name":"Speculative execution","level":2,"score":0.65601724},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.61007214},{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.49112412},{"id":"https://openalex.org/C1793878","wikidata":"https://www.wikidata.org/wiki/Q1153762","display_name":"Out-of-order execution","level":2,"score":0.47749895},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.44133508},{"id":"https://openalex.org/C9395851","wikidata":"https://www.wikidata.org/wiki/Q177929","display_name":"Stack (abstract data type)","level":2,"score":0.43532848},{"id":"https://openalex.org/C96147967","wikidata":"https://www.wikidata.org/wiki/Q190686","display_name":"Subroutine","level":2,"score":0.41855788},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2848794},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.25905466}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.1996.563559","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/16","display_name":"Peace, justice, and strong institutions","score":0.62}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":22,"referenced_works":["https://openalex.org/W1552694545","https://openalex.org/W1736634110","https://openalex.org/W1964750864","https://openalex.org/W1991724453","https://openalex.org/W2003102128","https://openalex.org/W2015454481","https://openalex.org/W2026438857","https://openalex.org/W2035206467","https://openalex.org/W2062172248","https://openalex.org/W2113001268","https://openalex.org/W2117226389","https://openalex.org/W2122547260","https://openalex.org/W2128731376","https://openalex.org/W2142571940","https://openalex.org/W2154558311","https://openalex.org/W2157364313","https://openalex.org/W2161327027","https://openalex.org/W2167732362","https://openalex.org/W4230971381","https://openalex.org/W4247705621","https://openalex.org/W4252533346","https://openalex.org/W4256018993"],"related_works":["https://openalex.org/W37057355","https://openalex.org/W2980216145","https://openalex.org/W2897302968","https://openalex.org/W2150776253","https://openalex.org/W2113960387","https://openalex.org/W2085860917","https://openalex.org/W2053687647","https://openalex.org/W1977470888","https://openalex.org/W1916582918","https://openalex.org/W1595275176"],"abstract_inverted_index":{"This":[0,103],"paper":[1],"describes":[2],"the":[3,6,81,86,94],"microarchitecture":[4],"of":[5,23,72,75,80,101,107,109],"32-bit":[7],"superscalar":[8],"microprocessor":[9],"GMICRO/400":[10],"with":[11,113],"simple":[12],"prejump":[13,118],"mechanisms":[14],"and":[15,27,85,91,97,120],"its":[16],"performance":[17,104],"evaluation.":[18],"GMICR0/400":[19,44],"has":[20],"six":[21],"stages":[22],"instruction":[24],"execution":[25],"pipeline":[26],"implements":[28],"a":[29,46,51,66,99,114],"dynamic":[30,41,61],"branch":[31,42,58,82],"prediction":[32],"scheme,":[33],"executing":[34],"jump":[35],"instructions":[36],"in":[37],"early":[38],"stages.":[39],"For":[40,60],"predictions,":[43,63],"contains":[45,65],"1-Kbit":[47],"table":[48,84],"which":[49,69],"holds":[50,70],"single":[52],"history":[53,83],"bit":[54],"for":[55,93],"each":[56],"conditional":[57],"instruction.":[59],"return-address":[62,87],"it":[64],"16-entry":[67],"stack,":[68],"copies":[71],"return":[73],"addresses":[74],"return-from-subroutine":[76],"instructions.":[77],"Prediction":[78],"accuracies":[79],"stack":[88],"are":[89],"81.7%":[90],"99.6%":[92],"SPECCINT92":[95],"respectively,":[96],"achieve":[98],"speed-up":[100],"1.27.":[102],"is":[105],"95%":[106],"that":[108],"an":[110],"ideal":[111],"model,":[112],"much":[115],"more":[116],"complex":[117],"mechanism":[119],"perfect":[121],"accuracies.":[122]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W1916582918","counts_by_year":[],"updated_date":"2025-01-11T15:49:35.811170","created_date":"2016-06-24"}