乐胖代购免代理版

{"id":"https://openalex.org/W1932820441","doi":"https://doi.org/10.1109/empdp.1998.647231","title":"Practical barrier synchronisation","display_name":"Practical barrier synchronisation","publication_year":2002,"publication_date":"2002-11-27","ids":{"openalex":"https://openalex.org/W1932820441","doi":"https://doi.org/10.1109/empdp.1998.647231","mag":"1932820441"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/empdp.1998.647231","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109967048","display_name":"Jonathan M. D. Hill","orcid":null},"institutions":[{"id":"https://openalex.org/I40120149","display_name":"University of Oxford","ror":"https://ror.org/052gg0110","country_code":"GB","type":"education","lineage":["https://openalex.org/I40120149"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"J.M.D. Hill","raw_affiliation_strings":["The Computing Laboratory, Oxford University, Oxford, UK"],"affiliations":[{"raw_affiliation_string":"The Computing Laboratory, Oxford University, Oxford, UK","institution_ids":["https://openalex.org/I40120149"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5006135009","display_name":"David B. Skillicorn","orcid":"https://orcid.org/0000-0003-0605-4029"},"institutions":[{"id":"https://openalex.org/I204722609","display_name":"Queen's University","ror":"https://ror.org/02y72wh86","country_code":"CA","type":"education","lineage":["https://openalex.org/I204722609"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"D.B. Skillicorn","raw_affiliation_strings":["Department of Computing and Information Science, Queen's University, Kingston, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Computing and Information Science, Queen's University, Kingston, Canada","institution_ids":["https://openalex.org/I204722609"]}]}],"institution_assertions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.497,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":34,"citation_normalized_percentile":{"value":0.880342,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":90},"biblio":{"volume":null,"issue":null,"first_page":"438","last_page":"444"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9981,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9981,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9962,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9958,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/semaphore","display_name":"Semaphore","score":0.8401535},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.5486716},{"id":"https://openalex.org/keywords/distributed-shared-memory","display_name":"Distributed shared memory","score":0.42107797},{"id":"https://openalex.org/keywords/distributed-memory","display_name":"Distributed memory","score":0.4122348}],"concepts":[{"id":"https://openalex.org/C95203288","wikidata":"https://www.wikidata.org/wiki/Q221682","display_name":"Semaphore","level":2,"score":0.8401535},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.81678355},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.5486716},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5159412},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.5002985},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.46528947},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.44306052},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.42610797},{"id":"https://openalex.org/C2781181686","wikidata":"https://www.wikidata.org/wiki/Q4226068","display_name":"Coherence (philosophical gambling strategy)","level":2,"score":0.42179137},{"id":"https://openalex.org/C39528615","wikidata":"https://www.wikidata.org/wiki/Q1229610","display_name":"Distributed shared memory","level":5,"score":0.42107797},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.41228634},{"id":"https://openalex.org/C91481028","wikidata":"https://www.wikidata.org/wiki/Q1054686","display_name":"Distributed memory","level":3,"score":0.4122348},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.41204488},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36555707},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.31230468},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.2791738},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.27164626},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.17943758},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1417954},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.110931545},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.110830694},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.07320416},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.062443018},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/empdp.1998.647231","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[],"grants":[],"datasets":[],"versions":[],"referenced_works_count":18,"referenced_works":["https://openalex.org/W134816542","https://openalex.org/W1488103720","https://openalex.org/W1498530182","https://openalex.org/W1527654363","https://openalex.org/W1555915743","https://openalex.org/W156442686","https://openalex.org/W1592397134","https://openalex.org/W1973797056","https://openalex.org/W1976279661","https://openalex.org/W1988780491","https://openalex.org/W2001738739","https://openalex.org/W2038149966","https://openalex.org/W2100342411","https://openalex.org/W2113442529","https://openalex.org/W2136314027","https://openalex.org/W2167655263","https://openalex.org/W4206525843","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W3216777841","https://openalex.org/W2955418457","https://openalex.org/W2764760984","https://openalex.org/W2135766592","https://openalex.org/W2129190953","https://openalex.org/W2110339542","https://openalex.org/W2109703550","https://openalex.org/W1965261831","https://openalex.org/W1797968800","https://openalex.org/W1579785083"],"abstract_inverted_index":{"We":[0,54,77],"investigate":[1],"the":[2,66],"performance":[3,22,34],"of":[4,19,49,65],"barrier":[5,36,75,99],"synchronisation":[6,37,100],"on":[7],"both":[8],"shared":[9,42],"memory":[10,13,28,43],"and":[11,61,94],"distributed":[12,27],"architectures,":[14,44],"using":[15,82],"a":[16,45,62,80],"wide":[17],"range":[18,48],"techniques.":[20],"The":[21],"results":[23],"obtained":[24],"show":[25,55,78],"that":[26,56,79],"architectures":[29],"behave":[30],"predictably,":[31],"although":[32],"their":[33],"for":[35],"is":[38,59,69,85,95],"relatively":[39],"poor.":[40],"For":[41],"much":[46],"larger":[47],"implementation":[50],"techniques":[51],"are":[52],"available.":[53],"asymptotic":[57],"analysis":[58],"useless,":[60],"detailed":[63],"understanding":[64],"underlying":[67],"hardware":[68],"required":[70],"to":[71],"design":[72],"an":[73],"effective":[74,87],"implementation.":[76],"technique":[81],"cache":[83],"coherence":[84],"more":[86],"than":[88],"semaphore":[89],"or":[90],"lock":[91],"based":[92],"techniques,":[93],"competitive":[96],"with":[97],"specialised":[98],"hardware.":[101]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W1932820441","counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2013,"cited_by_count":3}],"updated_date":"2024-12-09T13:49:42.296340","created_date":"2016-06-24"}