{"id":"https://openalex.org/W4242270144","doi":"https://doi.org/10.1109/date.2004.1268876","title":"System-level performance analysis in SystemC","display_name":"System-level performance analysis in SystemC","publication_year":2004,"publication_date":"2004-06-21","ids":{"openalex":"https://openalex.org/W4242270144","doi":"https://doi.org/10.1109/date.2004.1268876"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1268876","pdf_url":null,"source":{"id":"https://openalex.org/S4363608792","display_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077809133","display_name":"H\u00e9ctor Posadas","orcid":"https://orcid.org/0000-0002-1427-7524"},"institutions":[{"id":"https://openalex.org/I13134134","display_name":"Universidad de Cantabria","ror":"https://ror.org/046ffzj20","country_code":"ES","type":"education","lineage":["https://openalex.org/I13134134"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"H. Posadas","raw_affiliation_strings":["TEISA Department E.T.S.I. Industriales y Telecom, University of Cantabria, Santander, Spain"],"affiliations":[{"raw_affiliation_string":"TEISA Department E.T.S.I. Industriales y Telecom, University of Cantabria, Santander, Spain","institution_ids":["https://openalex.org/I13134134"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101860196","display_name":"Fernando Herrera","orcid":"https://orcid.org/0000-0001-7016-7891"},"institutions":[{"id":"https://openalex.org/I13134134","display_name":"Universidad de Cantabria","ror":"https://ror.org/046ffzj20","country_code":"ES","type":"education","lineage":["https://openalex.org/I13134134"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"F. Herrera","raw_affiliation_strings":["TEISA Department E.T.S.I. Industriales y Telecom, University of Cantabria, Santander, Spain"],"affiliations":[{"raw_affiliation_string":"TEISA Department E.T.S.I. Industriales y Telecom, University of Cantabria, Santander, Spain","institution_ids":["https://openalex.org/I13134134"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101992779","display_name":"Pablo S\u00e1nchez","orcid":"https://orcid.org/0000-0001-7363-5814"},"institutions":[{"id":"https://openalex.org/I13134134","display_name":"Universidad de Cantabria","ror":"https://ror.org/046ffzj20","country_code":"ES","type":"education","lineage":["https://openalex.org/I13134134"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"P. Sanchez","raw_affiliation_strings":["TEISA Department E.T.S.I. Industriales y Telecom, University of Cantabria, Santander, Spain"],"affiliations":[{"raw_affiliation_string":"TEISA Department E.T.S.I. Industriales y Telecom, University of Cantabria, Santander, Spain","institution_ids":["https://openalex.org/I13134134"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032788928","display_name":"Eugenio Villar","orcid":"https://orcid.org/0000-0002-6541-6176"},"institutions":[{"id":"https://openalex.org/I13134134","display_name":"Universidad de Cantabria","ror":"https://ror.org/046ffzj20","country_code":"ES","type":"education","lineage":["https://openalex.org/I13134134"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"E. Villar","raw_affiliation_strings":["TEISA Department E.T.S.I. Industriales y Telecom, University of Cantabria, Santander, Spain"],"affiliations":[{"raw_affiliation_string":"TEISA Department E.T.S.I. Industriales y Telecom, University of Cantabria, Santander, Spain","institution_ids":["https://openalex.org/I13134134"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5073376842","display_name":"F. Blasco","orcid":null},"institutions":[],"countries":["ES"],"is_corresponding":false,"raw_author_name":"F. Blasco","raw_affiliation_strings":["DS2 Robert Darwin 2, Parque Tecnol\u00f3gico, Paterna, Spain"],"affiliations":[{"raw_affiliation_string":"DS2 Robert Darwin 2, Parque Tecnol\u00f3gico, Paterna, Spain","institution_ids":[]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.229,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":20,"citation_normalized_percentile":{"value":0.822034,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":86,"max":87},"biblio":{"volume":"18","issue":null,"first_page":"378","last_page":"383"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9996,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.58168995},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-Level Synthesis","score":0.47066176},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.4270182}],"concepts":[{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.9103476},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.80973035},{"id":"https://openalex.org/C77495112","wikidata":"https://www.wikidata.org/wiki/Q5358436","display_name":"Electronic system-level design and verification","level":2,"score":0.61896646},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.58168995},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.49966097},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.47613004},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.47515914},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.47066176},{"id":"https://openalex.org/C2776036281","wikidata":"https://www.wikidata.org/wiki/Q48769818","display_name":"Constraint (computer-aided design)","level":2,"score":0.4449821},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.4270182},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.41981983},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41757786},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.41186744},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36856526},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1962544},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.17690477},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.10461047},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2004.1268876","pdf_url":null,"source":{"id":"https://openalex.org/S4363608792","display_name":"Proceedings Design, Automation and Test in Europe Conference and Exhibition","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[],"grants":[],"datasets":[],"versions":[],"referenced_works_count":20,"referenced_works":["https://openalex.org/W1498455513","https://openalex.org/W166039044","https://openalex.org/W1978118906","https://openalex.org/W2007873462","https://openalex.org/W2024800288","https://openalex.org/W2103897623","https://openalex.org/W2123654501","https://openalex.org/W2138863419","https://openalex.org/W2149355718","https://openalex.org/W2164500517","https://openalex.org/W2180551897","https://openalex.org/W2503657378","https://openalex.org/W4232048937","https://openalex.org/W4235415130","https://openalex.org/W4242079784","https://openalex.org/W4244469666","https://openalex.org/W4247386535","https://openalex.org/W4247732906","https://openalex.org/W4247871352","https://openalex.org/W4251840223"],"related_works":["https://openalex.org/W3206586607","https://openalex.org/W2752828786","https://openalex.org/W2579932084","https://openalex.org/W2548514518","https://openalex.org/W2544073398","https://openalex.org/W2242433395","https://openalex.org/W2141175904","https://openalex.org/W2133642747","https://openalex.org/W1831349210","https://openalex.org/W1603163876"],"abstract_inverted_index":{"As":[0,86],"both":[1],"the":[2,5,64,74,80,89,109,134,150,153,158,166,170,180,186],"ITRS":[3],"and":[4,31,57,72,100,122,139,141],"Medea+":[6],"DA":[7],"Roadmaps":[8],"have":[9],"highlighted,":[10],"early":[11],"performance":[12],"estimation":[13,46,75],"is":[14,52],"an":[15],"essential":[16],"step":[17],"in":[18,179],"any":[19,70,177],"SoC":[20],"design":[21,97,164],"methodology":[22,59,168],"based":[23,53],"on":[24,54,146],"International":[25],"Technology":[26],"Roadmap":[27,36],"for":[28,44,136,162,190],"Semiconductors":[29],"(2001)":[30],"The":[32,50,106,182],"MEDEA+":[33],"Design":[34],"Automation":[35],"(2002).":[37],"This":[38],"paper":[39],"presents":[40],"a":[41,55,83,87],"C++":[42],"library":[43,51,81],"timing":[45,192],"at":[47,176],"system":[48,96],"level.":[49],"general":[56],"systematic":[58],"that":[60,114],"takes":[61],"as":[62],"input":[63],"original":[65],"SystemC":[66],"source":[67],"code":[68],"without":[69,133],"modification":[71],"provides":[73],"parameters":[76,160],"by":[77],"simply":[78],"including":[79],"within":[82],"usual":[84],"simulation.":[85],"consequence,":[88],"same":[90],"models":[91],"of":[92,111,118,152],"computation":[93],"used":[94],"during":[95],"are":[98,104],"preserved":[99],"all":[101],"simulation":[102],"conditions":[103,121],"maintained.":[105],"method":[107],"exploits":[108],"advantages":[110],"dynamic":[112],"analysis,":[113],"is,":[115],"easy":[116],"management":[117],"unpredictable":[119],"data-dependent":[120],"computational":[123],"efficiency":[124],"compared":[125],"with":[126],"other":[127],"alternatives":[128],"(ISS":[129],"or":[130],"RT":[131],"simulation,":[132],"need":[135],"SW":[137],"generation":[138],"compilation":[140],"HW":[142],"synthesis).":[143],"Results":[144],"obtained":[145],"several":[147],"examples":[148],"show":[149],"accuracy":[151],"method.":[154],"In":[155],"addition":[156],"to":[157,172],"fundamental":[159],"needed":[161],"system-level":[163],"exploration,":[165],"proposed":[167],"allows":[169],"designer":[171],"include":[173],"capture":[174],"points":[175],"place":[178],"code.":[181],"user":[183],"can":[184],"process":[185],"corresponding":[187],"captured":[188],"events":[189],"unrestricted":[191],"constraint":[193],"verification.":[194]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W4242270144","counts_by_year":[{"year":2015,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2024-12-09T13:53:13.000601","created_date":"2022-05-12"}