{"id":"https://openalex.org/W2130790795","doi":"https://doi.org/10.1109/csse.2008.1018","title":"Parallel Clustering Algorithms for Image Processing on Multi-core CPUs","display_name":"Parallel Clustering Algorithms for Image Processing on Multi-core CPUs","publication_year":2008,"publication_date":"2008-01-01","ids":{"openalex":"https://openalex.org/W2130790795","doi":"https://doi.org/10.1109/csse.2008.1018","mag":"2130790795"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/csse.2008.1018","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100419573","display_name":"Honggang Wang","orcid":"https://orcid.org/0000-0001-9475-2630"},"institutions":[{"id":"https://openalex.org/I182707071","display_name":"Ludong University","ror":"https://ror.org/028h95t32","country_code":"CN","type":"education","lineage":["https://openalex.org/I182707071"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Honggang Wang","raw_affiliation_strings":["Coll. of Phys. & Electron. Eng., Ludong Univ., Yantai"],"affiliations":[{"raw_affiliation_string":"Coll. of Phys. & Electron. Eng., Ludong Univ., Yantai","institution_ids":["https://openalex.org/I182707071"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101024521","display_name":"Zhao Ji-de","orcid":null},"institutions":[{"id":"https://openalex.org/I182707071","display_name":"Ludong University","ror":"https://ror.org/028h95t32","country_code":"CN","type":"education","lineage":["https://openalex.org/I182707071"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jide Zhao","raw_affiliation_strings":["Coll. of Phys. & Electron. Eng., Ludong Univ., Yantai"],"affiliations":[{"raw_affiliation_string":"Coll. of Phys. & Electron. Eng., Ludong Univ., Yantai","institution_ids":["https://openalex.org/I182707071"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101700612","display_name":"Hongguang Li","orcid":"https://orcid.org/0000-0002-3466-4396"},"institutions":[{"id":"https://openalex.org/I182707071","display_name":"Ludong University","ror":"https://ror.org/028h95t32","country_code":"CN","type":"education","lineage":["https://openalex.org/I182707071"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hongguang Li","raw_affiliation_strings":["Coll. of Phys. & Electron. Eng., Ludong Univ., Yantai"],"affiliations":[{"raw_affiliation_string":"Coll. of Phys. & Electron. Eng., Ludong Univ., Yantai","institution_ids":["https://openalex.org/I182707071"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100336337","display_name":"Jianguo Wang","orcid":"https://orcid.org/0000-0002-6282-0456"},"institutions":[{"id":"https://openalex.org/I182707071","display_name":"Ludong University","ror":"https://ror.org/028h95t32","country_code":"CN","type":"education","lineage":["https://openalex.org/I182707071"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianguo Wang","raw_affiliation_strings":["Coll. of Phys. & Electron. Eng., Ludong Univ., Yantai"],"affiliations":[{"raw_affiliation_string":"Coll. of Phys. & Electron. Eng., Ludong Univ., Yantai","institution_ids":["https://openalex.org/I182707071"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.987,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":31,"citation_normalized_percentile":{"value":0.917732,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":92},"biblio":{"volume":null,"issue":null,"first_page":"450","last_page":"453"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10627","display_name":"Advanced Image and Video Retrieval Techniques","score":0.9981,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10627","display_name":"Advanced Image and Video Retrieval Techniques","score":0.9981,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10052","display_name":"Medical Image Segmentation Techniques","score":0.9969,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9887,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.8568948},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.48212242},{"id":"https://openalex.org/keywords/single-core","display_name":"Single-core","score":0.47008634}],"concepts":[{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.8568948},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.85678744},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.74553895},{"id":"https://openalex.org/C73555534","wikidata":"https://www.wikidata.org/wiki/Q622825","display_name":"Cluster analysis","level":2,"score":0.5923316},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5407259},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.51359415},{"id":"https://openalex.org/C159023740","wikidata":"https://www.wikidata.org/wiki/Q623276","display_name":"Deadlock","level":2,"score":0.51147354},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.48212242},{"id":"https://openalex.org/C2780365336","wikidata":"https://www.wikidata.org/wiki/Q25047934","display_name":"Single-core","level":2,"score":0.47008634},{"id":"https://openalex.org/C120373497","wikidata":"https://www.wikidata.org/wiki/Q1087987","display_name":"Parallel algorithm","level":2,"score":0.43575823},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.43396673},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3783631},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3246501},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.21602866},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.14375633},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11690423},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/csse.2008.1018","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.59}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":3,"referenced_works":["https://openalex.org/W2067191022","https://openalex.org/W2127218421","https://openalex.org/W2161813558"],"related_works":["https://openalex.org/W3041000698","https://openalex.org/W2543559046","https://openalex.org/W2406856881","https://openalex.org/W2276000909","https://openalex.org/W2182270028","https://openalex.org/W2151223307","https://openalex.org/W2142016460","https://openalex.org/W2085485158","https://openalex.org/W2022939529","https://openalex.org/W1964594690"],"abstract_inverted_index":{"Scaling":[0],"the":[1,10,52,69],"number":[2],"of":[3,29,51,103],"cores":[4],"on":[5,47,79,113],"processor":[6,49],"chips":[7],"has":[8],"become":[9],"trend":[11],"for":[12,72,76],"current":[13],"semiconduction":[14],"industry":[15],"(i.e.":[16],"Intel/AMD":[17],"many-core":[18],"CPU,":[19],"Nvida":[20],"GPU":[21],"etc).":[22],"Current":[23],"software":[24,46,74],"development":[25,75],"should":[26],"take":[27],"advantage":[28],"those":[30,104],"multi-core":[31],"platforms":[32],"to":[33,43,108],"achieve":[34,109],"high":[35],"performance.":[36],"But":[37],"it":[38],"is":[39,106],"a":[40],"challenging":[41],"task":[42],"develop":[44],"parallel":[45,73,101],"multiple":[48],"because":[50],"well":[53],"known":[54],"problems":[55],"such":[56],"as":[57],"deadlock,":[58],"load":[59],"balancing,":[60],"cache":[61],"conflicts":[62],"etc.":[63],"In":[64],"this":[65],"paper,":[66],"we":[67],"demonstrate":[68],"underlying":[70],"principles":[71],"image":[77],"processing":[78],"multicore":[80,114],"CPUs.":[81],"We":[82],"study":[83],"and":[84,92],"parallelize":[85],"two":[86],"popular":[87],"clustering":[88],"algorithms:":[89],"i)":[90],"k-means":[91],"ii)":[93],"mean-shift.":[94],"The":[95],"experimental":[96],"results":[97],"show":[98],"that":[99],"good":[100],"implementations":[102],"algorithms":[105],"able":[107],"nearly":[110],"linear":[111],"speedups":[112],"processors.":[115]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2130790795","counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":7},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":3}],"updated_date":"2024-12-08T02:00:18.321290","created_date":"2016-06-24"}