{"id":"https://openalex.org/W2141566180","doi":"https://doi.org/10.1109/ats.2005.71","title":"Investigations of Faulty DRAM Behavior Using Electrical Simulation Versus an Analytical Approach","display_name":"Investigations of Faulty DRAM Behavior Using Electrical Simulation Versus an Analytical Approach","publication_year":2005,"publication_date":"2005-01-01","ids":{"openalex":"https://openalex.org/W2141566180","doi":"https://doi.org/10.1109/ats.2005.71","mag":"2141566180"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/ats.2005.71","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5021955713","display_name":"Zaid Al-Ars","orcid":"https://orcid.org/0000-0001-7670-8572"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Z. Al-Ars","raw_affiliation_strings":["Fac. of EE, Math. & CS, Delft Univ. of Technol."],"affiliations":[{"raw_affiliation_string":"Fac. of EE, Math. & CS, Delft Univ. of Technol.","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005739146","display_name":"Said Hamdioui","orcid":"https://orcid.org/0000-0002-8961-0387"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"S. Hamdioui","raw_affiliation_strings":["Delft University of Technology, The Netherlands;"],"affiliations":[{"raw_affiliation_string":"Delft University of Technology, The Netherlands;","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013172628","display_name":"J. Vollrath","orcid":null},"institutions":[{"id":"https://openalex.org/I137594350","display_name":"Infineon Technologies (Germany)","ror":"https://ror.org/005kw6t15","country_code":"DE","type":"company","lineage":["https://openalex.org/I137594350"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"J. Vollrath","raw_affiliation_strings":["Infineon Technologies AG, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies AG, Munich, Germany","institution_ids":["https://openalex.org/I137594350"]}]}],"institution_assertions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.43,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":1,"citation_normalized_percentile":{"value":0.377735,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":61,"max":68},"biblio":{"volume":null,"issue":null,"first_page":"434","last_page":"439"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.84523284}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.84523284},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.70300215},{"id":"https://openalex.org/C132459708","wikidata":"https://www.wikidata.org/wiki/Q744069","display_name":"Extrapolation","level":2,"score":0.70250297},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5802234},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.5175823},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.43502283},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3329936},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.32907876},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32306844},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16321358},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.16181979},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/ats.2005.71","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[],"grants":[],"datasets":[],"versions":[],"referenced_works_count":5,"referenced_works":["https://openalex.org/W1887763765","https://openalex.org/W2039947128","https://openalex.org/W2112127942","https://openalex.org/W2122473626","https://openalex.org/W2132477396"],"related_works":["https://openalex.org/W4361730764","https://openalex.org/W4296478327","https://openalex.org/W2387596242","https://openalex.org/W2333625343","https://openalex.org/W2220129715","https://openalex.org/W2074627651","https://openalex.org/W2042397106","https://openalex.org/W1968270095","https://openalex.org/W1965029248","https://openalex.org/W1960072520"],"abstract_inverted_index":{"Fabrication":[0],"process":[1],"improvements":[2],"and":[3,12,55,75,100,104],"technology":[4],"scaling":[5],"results":[6,89],"in":[7,9,13,48],"modifications":[8],"the":[10,14,23,27,42,49,53,57,62,73,79,88,91,97,102],"characteristics":[11],"behavior":[15,25,44,80],"of":[16,26,41,45,78,81,90,106],"manufactured":[17],"memory":[18],"chips,":[19],"which":[20],"also":[21,86],"modifies":[22],"faulty":[24,43,63],"memory.":[28],"This":[29],"paper":[30,85],"introduces":[31],"an":[32],"analytical":[33,92],"(equation-based)":[34],"method":[35],"to":[36,71],"give":[37],"a":[38],"rough":[39],"analysis":[40,99],"cell":[46],"opens":[47],"memory,":[50],"that":[51],"simplifies":[52],"understanding":[54],"identifies":[56],"major":[58],"factors":[59,67],"responsible":[60],"for":[61],"behavior.":[64],"Having":[65],"these":[66],"makes":[68],"it":[69],"easier":[70],"optimize":[72],"circuit":[74],"allows":[76],"extrapolation":[77],"future":[82],"technologies.":[83],"The":[84],"compares":[87],"approach":[93],"with":[94],"those":[95],"from":[96],"simulation-based":[98],"discusses":[101],"advantages":[103],"disadvantages":[105],"both":[107]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2141566180","counts_by_year":[],"updated_date":"2024-12-09T20:16:04.379792","created_date":"2016-06-24"}