{"id":"https://openalex.org/W2138231214","doi":"https://doi.org/10.1109/async.2007.11","title":"Asynchronous on-Chip Communication: Explorations on the Intel PXA27x Processor Peripheral Bus","display_name":"Asynchronous on-Chip Communication: Explorations on the Intel PXA27x Processor Peripheral Bus","publication_year":2007,"publication_date":"2007-03-01","ids":{"openalex":"https://openalex.org/W2138231214","doi":"https://doi.org/10.1109/async.2007.11","mag":"2138231214"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/async.2007.11","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078312966","display_name":"Andrew M. Scott","orcid":"https://orcid.org/0000-0002-6656-295X"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Andrew M. Scott","raw_affiliation_strings":["Intel Corporation, Austin, TX#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Austin, TX#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064576625","display_name":"Mark E. Schuelein","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark E. Schuelein","raw_affiliation_strings":["Intel Corporation, Austin, TX#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Austin, TX#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083773051","display_name":"Marly Roncken","orcid":"https://orcid.org/0000-0002-3703-3856"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Marly Roncken","raw_affiliation_strings":["Intel Corporation, Austin, TX#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Austin, TX#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043888749","display_name":"Jin-Jer Hwan","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jin-Jer Hwan","raw_affiliation_strings":["Intel Corporation, Austin, TX#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Austin, TX#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027781767","display_name":"John Bainbridge","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127206","display_name":"Silixa (United Kingdom)","ror":"https://ror.org/031jzas57","country_code":"GB","type":"company","lineage":["https://openalex.org/I4210127206"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"John Bainbridge","raw_affiliation_strings":["Silistix Ltd., Manchester, UK#TAB#"],"affiliations":[{"raw_affiliation_string":"Silistix Ltd., Manchester, UK#TAB#","institution_ids":["https://openalex.org/I4210127206"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064397225","display_name":"John Mawer","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127206","display_name":"Silixa (United Kingdom)","ror":"https://ror.org/031jzas57","country_code":"GB","type":"company","lineage":["https://openalex.org/I4210127206"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"John R. Mawer","raw_affiliation_strings":["Silistix Ltd., Manchester, UK#TAB#"],"affiliations":[{"raw_affiliation_string":"Silistix Ltd., Manchester, UK#TAB#","institution_ids":["https://openalex.org/I4210127206"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039125300","display_name":"David Jackson","orcid":"https://orcid.org/0000-0002-1975-8132"},"institutions":[{"id":"https://openalex.org/I4210127206","display_name":"Silixa (United Kingdom)","ror":"https://ror.org/031jzas57","country_code":"GB","type":"company","lineage":["https://openalex.org/I4210127206"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"David L. Jackson","raw_affiliation_strings":["Silistix Ltd., Manchester, UK#TAB#"],"affiliations":[{"raw_affiliation_string":"Silistix Ltd., Manchester, UK#TAB#","institution_ids":["https://openalex.org/I4210127206"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5037525378","display_name":"Andrew Bardsley","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127206","display_name":"Silixa (United Kingdom)","ror":"https://ror.org/031jzas57","country_code":"GB","type":"company","lineage":["https://openalex.org/I4210127206"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Andrew Bardsley","raw_affiliation_strings":["Silistix Ltd., Manchester, UK#TAB#"],"affiliations":[{"raw_affiliation_string":"Silistix Ltd., Manchester, UK#TAB#","institution_ids":["https://openalex.org/I4210127206"]}]}],"institution_assertions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.559,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":8,"citation_normalized_percentile":{"value":0.700805,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":81,"max":82},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.489279},{"id":"https://openalex.org/keywords/back-side-bus","display_name":"Back-side bus","score":0.46037063}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.86908406},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7390207},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6259181},{"id":"https://openalex.org/C136321198","wikidata":"https://www.wikidata.org/wiki/Q2377054","display_name":"System bus","level":2,"score":0.5945517},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5505937},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.51625586},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.489279},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.48806942},{"id":"https://openalex.org/C121013533","wikidata":"https://www.wikidata.org/wiki/Q742323","display_name":"Back-side bus","level":5,"score":0.46037063},{"id":"https://openalex.org/C202015219","wikidata":"https://www.wikidata.org/wiki/Q6664300","display_name":"Local bus","level":4,"score":0.43624112},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4164112},{"id":"https://openalex.org/C203315745","wikidata":"https://www.wikidata.org/wiki/Q2235486","display_name":"Control bus","level":3,"score":0.37538552},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.30456138},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.25854093},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.24586558},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1789178},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/async.2007.11","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[],"grants":[],"datasets":[],"versions":[],"referenced_works_count":10,"referenced_works":["https://openalex.org/W1549678711","https://openalex.org/W1609287256","https://openalex.org/W186740131","https://openalex.org/W1971600474","https://openalex.org/W2031273683","https://openalex.org/W2116651175","https://openalex.org/W2121914493","https://openalex.org/W2134829921","https://openalex.org/W2161901477","https://openalex.org/W2293601555"],"related_works":["https://openalex.org/W70103254","https://openalex.org/W4255235451","https://openalex.org/W4244800129","https://openalex.org/W2787679733","https://openalex.org/W2404980846","https://openalex.org/W2387146226","https://openalex.org/W2383984117","https://openalex.org/W2379360430","https://openalex.org/W2026314975","https://openalex.org/W1494565374"],"abstract_inverted_index":{"For":[0],"today's":[1],"SoC":[2],"designer,":[3],"on-die":[4],"variation,":[5],"clock":[6],"distribution,":[7],"timing":[8,105],"closure,":[9],"and":[10,34,58,95,107,128,135,138],"power":[11,103],"concerns":[12],"confront":[13],"the":[14,27,65,114],"desire":[15],"to":[16,19,47,76,91],"get":[17],"products":[18],"market":[20],"quicker.":[21],"Each":[22],"new":[23],"process":[24,31],"generation":[25],"makes":[26],"challenge":[28],"greater":[29],"as":[30,56],"skews,":[32],"complexity,":[33],"frequency":[35],"become":[36],"more":[37],"onerous.":[38],"This":[39],"is":[40,113],"particularly":[41],"true":[42],"for":[43,123],"signals":[44],"that":[45],"have":[46],"travel":[48],"across":[49],"larger":[50],"portions":[51],"of":[52,67],"a":[53,85,120],"chip":[54],"such":[55],"clocks":[57],"buses.":[59],"In":[60],"this":[61],"paper,":[62],"we":[63],"examine":[64],"use":[66],"GALS":[68],"(Globally":[69],"Asynchronous,":[70],"Locally":[71],"Synchronous)":[72],"[Chapiro,":[73],"1985]":[74],"techniques":[75],"address":[77],"on-chip":[78],"communication":[79,139],"between":[80],"different":[81],"synchronous":[82],"modules":[83],"on":[84,126],"bus.":[86],"We":[87],"explore":[88],"issues":[89],"related":[90,129],"validation,":[92],"module":[93],"interfaces":[94],"tool":[96],"flows,":[97],"while":[98],"looking":[99],"at":[100],"advantages":[101],"in":[102,132],"savings,":[104],"closure":[106],"Time-to-Market/Time-to-Money":[108],"(TTM).":[109],"Our":[110],"exploration":[111],"vehicle":[112],"IntelregPXA27x":[115],"Peripheral":[116],"Bus":[117],"(PB)":[118],"-":[119],"common":[121],"interface":[122],"connecting":[124],"peripherals":[125],"PXA27x":[127],"processor":[130],"families":[131],"Intel's":[133],"cellular":[134],"handheld":[136],"application":[137],"domain.":[140]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2138231214","counts_by_year":[{"year":2013,"cited_by_count":1}],"updated_date":"2024-12-15T13:15:58.611169","created_date":"2016-06-24"}