乐胖代购免代理版

{"id":"https://openalex.org/W1974108306","doi":"https://doi.org/10.1109/aspdac.2015.7059026","title":"A three-stage-write scheme with flip-bit for PCM main memory","display_name":"A three-stage-write scheme with flip-bit for PCM main memory","publication_year":2015,"publication_date":"2015-01-01","ids":{"openalex":"https://openalex.org/W1974108306","doi":"https://doi.org/10.1109/aspdac.2015.7059026","mag":"1974108306"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2015.7059026","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100771495","display_name":"Yanbin Li","orcid":"https://orcid.org/0000-0001-7151-9270"},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"funder","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"None Yanbin Li","raw_affiliation_strings":["School of Computer Science and Technology Shandong University Jinan 250101 China"],"affiliations":[{"raw_affiliation_string":"School of Computer Science and Technology Shandong University Jinan 250101 China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100658181","display_name":"Xin Li","orcid":"https://orcid.org/0000-0002-1670-1368"},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"funder","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"None Xin Li","raw_affiliation_strings":["School of Computer Science and Technology Shandong University Jinan 250101 China"],"affiliations":[{"raw_affiliation_string":"School of Computer Science and Technology Shandong University Jinan 250101 China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063104755","display_name":"Lei Ju","orcid":"https://orcid.org/0000-0001-6186-5399"},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"funder","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"None Lei Ju","raw_affiliation_strings":["School of Computer Science and Technology Shandong University Jinan 250101 China"],"affiliations":[{"raw_affiliation_string":"School of Computer Science and Technology Shandong University Jinan 250101 China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076117279","display_name":"Zhiping Jia","orcid":"https://orcid.org/0000-0002-7769-4771"},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"funder","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"None Zhiping Jia","raw_affiliation_strings":["School of Computer Science and Technology Shandong University Jinan 250101 China"],"affiliations":[{"raw_affiliation_string":"School of Computer Science and Technology Shandong University Jinan 250101 China","institution_ids":["https://openalex.org/I154099455"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.759,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":16,"citation_normalized_percentile":{"value":0.847529,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":90},"biblio":{"volume":null,"issue":null,"first_page":"328","last_page":"333"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9989,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9984,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-change-memory","display_name":"Phase-change memory","score":0.70864654},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.578952},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-Volatile Memory","score":0.4700892},{"id":"https://openalex.org/keywords/access-time","display_name":"Access time","score":0.41875517}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7702973},{"id":"https://openalex.org/C64142963","wikidata":"https://www.wikidata.org/wiki/Q1153902","display_name":"Phase-change memory","level":3,"score":0.70864654},{"id":"https://openalex.org/C90805587","wikidata":"https://www.wikidata.org/wiki/Q10944557","display_name":"Word (group theory)","level":2,"score":0.5801869},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.578952},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5304909},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.49640518},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.4700892},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.43370014},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.42978203},{"id":"https://openalex.org/C194080101","wikidata":"https://www.wikidata.org/wiki/Q46306","display_name":"Access time","level":2,"score":0.41875517},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3868795},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38162595},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.3643587},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.21045506},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1668014},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.122965276},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.10402596},{"id":"https://openalex.org/C133256868","wikidata":"https://www.wikidata.org/wiki/Q7180940","display_name":"Phase change","level":2,"score":0.08181074},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.077816576},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.06676197},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C61696701","wikidata":"https://www.wikidata.org/wiki/Q770766","display_name":"Engineering physics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2015.7059026","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.91,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":17,"referenced_works":["https://openalex.org/W1977871809","https://openalex.org/W2014265395","https://openalex.org/W2032091965","https://openalex.org/W2049986441","https://openalex.org/W2082070657","https://openalex.org/W2097823832","https://openalex.org/W2102449048","https://openalex.org/W2112753327","https://openalex.org/W2112768159","https://openalex.org/W2115500527","https://openalex.org/W2121795083","https://openalex.org/W2124165274","https://openalex.org/W2130657217","https://openalex.org/W2137598681","https://openalex.org/W2147657366","https://openalex.org/W2160401437","https://openalex.org/W4234463937"],"related_works":["https://openalex.org/W776329307","https://openalex.org/W4254007354","https://openalex.org/W4234756210","https://openalex.org/W4232117715","https://openalex.org/W2505369450","https://openalex.org/W2315140189","https://openalex.org/W2019862949","https://openalex.org/W1989028197","https://openalex.org/W1977963439","https://openalex.org/W1486495540"],"abstract_inverted_index":{"Phase-change":[0],"memory":[1,6,82],"(PCM)":[2],"is":[3,98,121],"a":[4,18,21,33,43,62,73,124],"nonvolatile":[5],"which":[7],"suffers":[8],"slow":[9],"write":[10,14,53,61,75,91,96,177,195,199],"performance":[11],"and":[12,40,51,90,103,112,117,133,148,171,197],"limited":[13],"endurance.":[15],"Besides,":[16],"writing":[17,32],"one":[19,149],"to":[20,56,60,83,126,138,158],"PCM":[22,37,80,139],"cell":[23],"needs":[24],"longer":[25],"time":[26,50,54,59,66,161,169,196],"but":[27],"less":[28],"electrical":[29],"current":[30],"than":[31],"zero.":[34],"In":[35,68,93,106],"traditional":[36,164],"schemes,":[38],"zeros":[39],"ones":[41],"in":[42,141,154,163],"word":[44,52],"are":[45,115,136,151],"written":[46,137,152],"at":[47],"the":[48,58,85,107,118,131,160],"same":[49],"has":[55],"be":[57],"one,":[63],"thus":[64],"incurring":[65],"waste.":[67],"this":[69,188],"paper,":[70],"we":[71],"propose":[72],"three-stage":[74],"scheme":[76,167,189],"with":[77],"flip-bit":[78,125,132],"for":[79],"main":[81],"reduce":[84],"number":[86],"of":[87],"changed":[88,128],"bits":[89,147,150],"latency.":[92],"our":[94],"scheme,":[95],"operation":[97,178],"divided":[99],"into":[100],"comparison,":[101],"write-0":[102],"write-1":[104],"stages.":[105],"comparison":[108],"stage,":[109],"new":[110,119],"data":[111,114,120,135],"old":[113],"compared":[116],"re-encoded":[122,134],"by":[123,176],"minimize":[127],"bits.":[129],"Then":[130],"cells":[140],"an":[142],"accelerating":[143],"manner.":[144],"All":[145],"zero":[146],"separately":[153],"later":[155],"two":[156],"stages":[157],"avoid":[159],"waste":[162],"write.":[165],"Our":[166],"shrinks":[168],"consumption":[170,201],"reduces":[172],"bit":[173,192],"changes":[174],"caused":[175],"over":[179],"other":[180],"existing":[181],"schemes.":[182],"The":[183],"experimental":[184],"results":[185],"show":[186],"that":[187],"decreases":[190],"43.5%":[191],"changes,":[193],"16.6%":[194],"34.6%":[198],"energy":[200],"on":[202],"average.":[203]},"abstract_inverted_index_v3":null,"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W1974108306","counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":1}],"updated_date":"2025-04-19T00:09:11.980849","created_date":"2016-06-24"}