乐胖代购免代理版

{"id":"https://openalex.org/W2119736999","doi":"https://doi.org/10.1109/asap.2010.5540750","title":"A C++-embedded Domain-Specific Language for programming the MORA soft processor array","display_name":"A C++-embedded Domain-Specific Language for programming the MORA soft processor array","publication_year":2010,"publication_date":"2010-07-01","ids":{"openalex":"https://openalex.org/W2119736999","doi":"https://doi.org/10.1109/asap.2010.5540750","mag":"2119736999"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.2010.5540750","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"proceedings-article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://eprints.gla.ac.uk/40002/1/ID40002.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047735250","display_name":"Wim Vanderbauwhede","orcid":"https://orcid.org/0000-0001-6768-0037"},"institutions":[{"id":"https://openalex.org/I7882870","display_name":"University of Glasgow","ror":"https://ror.org/00vtgdb53","country_code":"GB","type":"funder","lineage":["https://openalex.org/I7882870"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"W. Vanderbauwhede","raw_affiliation_strings":["[Department of Computer Science, University of Glasgow, Glasgow, UK]"],"affiliations":[{"raw_affiliation_string":"[Department of Computer Science, University of Glasgow, Glasgow, UK]","institution_ids":["https://openalex.org/I7882870"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062664944","display_name":"Martin Margala","orcid":"https://orcid.org/0000-0002-0034-0369"},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"funder","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Margala","raw_affiliation_strings":["Dept. of Electr. & Comput. Eng., Univ. of Massachusetts at Lowell, Lowell, MA, USA"],"affiliations":[{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Massachusetts at Lowell, Lowell, MA, USA","institution_ids":["https://openalex.org/I24603500"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079257666","display_name":"Sai Rahul Chalamalasetti","orcid":"https://orcid.org/0000-0001-9004-440X"},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"funder","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. R. Chalamalasetti","raw_affiliation_strings":["Dept. of Electr. & Comput. Eng., Univ. of Massachusetts at Lowell, Lowell, MA, USA"],"affiliations":[{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Massachusetts at Lowell, Lowell, MA, USA","institution_ids":["https://openalex.org/I24603500"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109104631","display_name":"Sohan Purohit","orcid":null},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"funder","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Purohit","raw_affiliation_strings":["Dept. of Electr. & Comput. Eng., Univ. of Massachusetts at Lowell, Lowell, MA, USA"],"affiliations":[{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Massachusetts at Lowell, Lowell, MA, USA","institution_ids":["https://openalex.org/I24603500"]}]}],"institution_assertions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.205,"has_fulltext":true,"fulltext_origin":"pdf","cited_by_count":11,"citation_normalized_percentile":{"value":0.68323,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":85,"max":86},"biblio":{"volume":null,"issue":null,"first_page":"141","last_page":"148"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9983,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/toolchain","display_name":"Toolchain","score":0.8760542},{"id":"https://openalex.org/keywords/domain-specific-language","display_name":"Domain-specific language","score":0.5723283},{"id":"https://openalex.org/keywords/bitstream","display_name":"Bitstream","score":0.56226426},{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.5063096},{"id":"https://openalex.org/keywords/haskell","display_name":"Haskell","score":0.46803716},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.44429517},{"id":"https://openalex.org/keywords/stream-processing","display_name":"Stream Processing","score":0.43134394}],"concepts":[{"id":"https://openalex.org/C2777062904","wikidata":"https://www.wikidata.org/wiki/Q545406","display_name":"Toolchain","level":3,"score":0.8760542},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.83260286},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8135388},{"id":"https://openalex.org/C201374245","wikidata":"https://www.wikidata.org/wiki/Q104534","display_name":"Digital subscriber line","level":2,"score":0.72957736},{"id":"https://openalex.org/C135257023","wikidata":"https://www.wikidata.org/wiki/Q691358","display_name":"Domain-specific language","level":2,"score":0.5723283},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5678718},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.56553143},{"id":"https://openalex.org/C136695289","wikidata":"https://www.wikidata.org/wiki/Q415568","display_name":"Bitstream","level":3,"score":0.56226426},{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.5063096},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.47833797},{"id":"https://openalex.org/C2780624054","wikidata":"https://www.wikidata.org/wiki/Q34010","display_name":"Haskell","level":3,"score":0.46803716},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.44429517},{"id":"https://openalex.org/C107027933","wikidata":"https://www.wikidata.org/wiki/Q2006448","display_name":"Stream processing","level":2,"score":0.43134394},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.39784497},{"id":"https://openalex.org/C42383842","wikidata":"https://www.wikidata.org/wiki/Q193076","display_name":"Functional programming","level":2,"score":0.3057269},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.28398693},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.13133284},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.109799415},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.09497255},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.2010.5540750","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},{"is_oa":true,"landing_page_url":"https://eprints.gla.ac.uk/40002/1/ID40002.pdf","pdf_url":"https://eprints.gla.ac.uk/40002/1/ID40002.pdf","source":{"id":"https://openalex.org/S4306400411","display_name":"Enlighten: Publications (The University of Glasgow)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_indexed_in_scopus":false,"is_core":false,"host_organization":"https://openalex.org/I7882870","host_organization_name":"University of Glasgow","host_organization_lineage":["https://openalex.org/I7882870"],"host_organization_lineage_names":["University of Glasgow"],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false}],"best_oa_location":{"is_oa":true,"landing_page_url":"https://eprints.gla.ac.uk/40002/1/ID40002.pdf","pdf_url":"https://eprints.gla.ac.uk/40002/1/ID40002.pdf","source":{"id":"https://openalex.org/S4306400411","display_name":"Enlighten: Publications (The University of Glasgow)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_indexed_in_scopus":false,"is_core":false,"host_organization":"https://openalex.org/I7882870","host_organization_name":"University of Glasgow","host_organization_lineage":["https://openalex.org/I7882870"],"host_organization_lineage_names":["University of Glasgow"],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.47,"display_name":"Industry, innovation and infrastructure"}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":15,"referenced_works":["https://openalex.org/W1517544154","https://openalex.org/W1963863686","https://openalex.org/W1982205631","https://openalex.org/W2016688446","https://openalex.org/W2036673855","https://openalex.org/W2042835112","https://openalex.org/W2043858766","https://openalex.org/W2096525649","https://openalex.org/W2112432448","https://openalex.org/W2113506453","https://openalex.org/W2136383686","https://openalex.org/W2150936902","https://openalex.org/W2154428928","https://openalex.org/W2154949869","https://openalex.org/W4236089896"],"related_works":["https://openalex.org/W633399213","https://openalex.org/W4233332105","https://openalex.org/W3122607007","https://openalex.org/W2912406603","https://openalex.org/W2183725039","https://openalex.org/W2088217310","https://openalex.org/W2060824677","https://openalex.org/W1663248305","https://openalex.org/W1598796492","https://openalex.org/W156394931"],"abstract_inverted_index":{"MORA":[0,41,78,95],"is":[1,47],"a":[2,32,54,65],"novel":[3],"platform":[4],"for":[5,36,68,93],"high-level":[6,37],"FPGA":[7,74],"programming":[8,38,103],"of":[9,21,24,39],"streaming":[10],"vector":[11],"and":[12,58,86,97,105],"matrix":[13],"operations,":[14],"aimed":[15],"at":[16],"multimedia":[17],"applications.":[18],"It":[19],"consists":[20],"soft":[22,42],"array":[23],"pipelined":[25],"low-complexity":[26],"SIMD":[27],"processors-in-memory":[28],"(PIM).":[29],"We":[30],"present":[31],"Domain-Specific":[33],"Language":[34],"(DSL)":[35],"the":[40,59,73,77,83,87,91,94,102],"processor":[43],"array.":[44],"The":[45,80],"DSL":[46,85],"embedded":[48],"in":[49],"C++,":[50],"providing":[51],"designers":[52],"with":[53],"familiar":[55],"language":[56],"framework":[57],"ability":[60],"to":[61,100],"compile":[62],"designs":[63],"using":[64,76],"standard":[66],"compiler":[67],"functional":[69],"testing":[70],"before":[71],"generating":[72],"bitstream":[75],"toolchain.":[79],"paper":[81],"discusses":[82],"MORA-C++":[84],"compilation":[88],"route":[89],"into":[90],"assembly":[92],"machine":[96],"provides":[98],"examples":[99],"illustrate":[101],"model":[104],"performance.":[106]},"abstract_inverted_index_v3":null,"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2119736999","counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":4}],"updated_date":"2025-04-15T21:43:56.625333","created_date":"2016-06-24"}