{"id":"https://openalex.org/W2116764435","doi":"https://doi.org/10.1109/4.641687","title":"A 4.1-ns compact 54\u00d754-b multiplier utilizing sign-select Booth encoders","display_name":"A 4.1-ns compact 54\u00d754-b multiplier utilizing sign-select Booth encoders","publication_year":1997,"publication_date":"1997-01-01","ids":{"openalex":"https://openalex.org/W2116764435","doi":"https://doi.org/10.1109/4.641687","mag":"2116764435"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/4.641687","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026834719","display_name":"G. Goto","orcid":null},"institutions":[{"id":"https://openalex.org/I2252096349","display_name":"Fujitsu (Japan)","ror":"https://ror.org/038e2g226","country_code":"JP","type":"company","lineage":["https://openalex.org/I2252096349"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"G. Goto","raw_affiliation_strings":["[Syst. LSI Dev. Labs., Fujitsu Labs. Ltd., Kawasaki, Japan]"],"affiliations":[{"raw_affiliation_string":"[Syst. LSI Dev. Labs., Fujitsu Labs. Ltd., Kawasaki, Japan]","institution_ids":["https://openalex.org/I2252096349"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101454429","display_name":"Akihisa Inoue","orcid":"https://orcid.org/0000-0002-6902-3409"},"institutions":[{"id":"https://openalex.org/I2252096349","display_name":"Fujitsu (Japan)","ror":"https://ror.org/038e2g226","country_code":"JP","type":"company","lineage":["https://openalex.org/I2252096349"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"A. Inoue","raw_affiliation_strings":["[System LSI Development Laboratories, Fujitsu Laboratories Limited, Kawasaki, Japan]"],"affiliations":[{"raw_affiliation_string":"[System LSI Development Laboratories, Fujitsu Laboratories Limited, Kawasaki, Japan]","institution_ids":["https://openalex.org/I2252096349"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074915944","display_name":"R. Ohe","orcid":null},"institutions":[{"id":"https://openalex.org/I2252096349","display_name":"Fujitsu (Japan)","ror":"https://ror.org/038e2g226","country_code":"JP","type":"company","lineage":["https://openalex.org/I2252096349"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"R. Ohe","raw_affiliation_strings":["[System LSI Development Laboratories, Fujitsu Laboratories Limited, Kawasaki, Japan]"],"affiliations":[{"raw_affiliation_string":"[System LSI Development Laboratories, Fujitsu Laboratories Limited, Kawasaki, Japan]","institution_ids":["https://openalex.org/I2252096349"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006090620","display_name":"S. Kashiwakura","orcid":null},"institutions":[{"id":"https://openalex.org/I2252096349","display_name":"Fujitsu (Japan)","ror":"https://ror.org/038e2g226","country_code":"JP","type":"company","lineage":["https://openalex.org/I2252096349"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"S. Kashiwakura","raw_affiliation_strings":["[System LSI Development Laboratories, Fujitsu Laboratories Limited, Kawasaki, Japan]"],"affiliations":[{"raw_affiliation_string":"[System LSI Development Laboratories, Fujitsu Laboratories Limited, Kawasaki, Japan]","institution_ids":["https://openalex.org/I2252096349"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076629742","display_name":"S. Mitarai","orcid":null},"institutions":[{"id":"https://openalex.org/I2252096349","display_name":"Fujitsu (Japan)","ror":"https://ror.org/038e2g226","country_code":"JP","type":"company","lineage":["https://openalex.org/I2252096349"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"S. Mitarai","raw_affiliation_strings":["[Systems LSI Development Laboratories, Fujitsu Laboratories Limited, Kawasaki, Japan]"],"affiliations":[{"raw_affiliation_string":"[Systems LSI Development Laboratories, Fujitsu Laboratories Limited, Kawasaki, Japan]","institution_ids":["https://openalex.org/I2252096349"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060279814","display_name":"Takeshi Go Tsuru","orcid":"https://orcid.org/0000-0002-5504-4903"},"institutions":[{"id":"https://openalex.org/I2252096349","display_name":"Fujitsu (Japan)","ror":"https://ror.org/038e2g226","country_code":"JP","type":"company","lineage":["https://openalex.org/I2252096349"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Tsuru","raw_affiliation_strings":["[Systems LSI Development Laboratories, Fujitsu Laboratories Limited, Kawasaki, Japan]"],"affiliations":[{"raw_affiliation_string":"[Systems LSI Development Laboratories, Fujitsu Laboratories Limited, Kawasaki, Japan]","institution_ids":["https://openalex.org/I2252096349"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109966470","display_name":"T. Izawa","orcid":null},"institutions":[{"id":"https://openalex.org/I2252096349","display_name":"Fujitsu (Japan)","ror":"https://ror.org/038e2g226","country_code":"JP","type":"company","lineage":["https://openalex.org/I2252096349"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Izawa","raw_affiliation_strings":["[Systems LSI Development Laboratories, Fujitsu Laboratories Limited, Kawasaki, Japan]"],"affiliations":[{"raw_affiliation_string":"[Systems LSI Development Laboratories, Fujitsu Laboratories Limited, Kawasaki, Japan]","institution_ids":["https://openalex.org/I2252096349"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.741,"has_fulltext":true,"fulltext_origin":"ngrams","cited_by_count":96,"citation_normalized_percentile":{"value":0.93884,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":95,"max":96},"biblio":{"volume":"32","issue":"11","first_page":"1676","last_page":"1682"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.999,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transistor-count","display_name":"Transistor count","score":0.76094604},{"id":"https://openalex.org/keywords/booths-multiplication-algorithm","display_name":"Booth's multiplication algorithm","score":0.69410163},{"id":"https://openalex.org/keywords/gate-count","display_name":"Gate count","score":0.4201137}],"concepts":[{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.7658014},{"id":"https://openalex.org/C196320899","wikidata":"https://www.wikidata.org/wiki/Q2623746","display_name":"Transistor count","level":4,"score":0.76094604},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.70466113},{"id":"https://openalex.org/C72475854","wikidata":"https://www.wikidata.org/wiki/Q477049","display_name":"Booth's multiplication algorithm","level":4,"score":0.69410163},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5785293},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.54976076},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5268178},{"id":"https://openalex.org/C139676723","wikidata":"https://www.wikidata.org/wiki/Q1193832","display_name":"Sign (mathematics)","level":2,"score":0.48604566},{"id":"https://openalex.org/C131097465","wikidata":"https://www.wikidata.org/wiki/Q178898","display_name":"Gas compressor","level":2,"score":0.4675466},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4566388},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.42120746},{"id":"https://openalex.org/C2777892113","wikidata":"https://www.wikidata.org/wiki/Q5527005","display_name":"Gate count","level":2,"score":0.4201137},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35287464},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3005615},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.28024438},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.22863013},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.22668785},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22476107},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11355448},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1109/4.641687","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.88}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":10,"referenced_works":["https://openalex.org/W1518793162","https://openalex.org/W1571837316","https://openalex.org/W1603218937","https://openalex.org/W1983849809","https://openalex.org/W2026445983","https://openalex.org/W2055119962","https://openalex.org/W2098734407","https://openalex.org/W2125499679","https://openalex.org/W2171647330","https://openalex.org/W2787898066"],"related_works":["https://openalex.org/W3205148284","https://openalex.org/W3096907109","https://openalex.org/W2993141888","https://openalex.org/W2596878920","https://openalex.org/W2546612563","https://openalex.org/W2184818077","https://openalex.org/W2182511681","https://openalex.org/W2158685723","https://openalex.org/W2153963611","https://openalex.org/W2143851143"],"abstract_inverted_index":{"A":[0],"54/spl":[1,102],"times/54-b":[2,103],"multiplier":[3,92,104],"with":[4,39,64],"only":[5],"60":[6],"K":[7],"transistors":[8],"has":[9],"been":[10],"fabricated":[11],"by":[12,60,76,95],"0.25-/spl":[13],"mu/m":[14],"CMOS":[15],"technology.":[16],"To":[17],"reduce":[18,56],"the":[19,48,57,67,74,86,91,101,110],"total":[20,87],"transistor":[21,41,58,88],"count,":[22],"we":[23],"have":[24],"developed":[25],"two":[26],"new":[27,71,84],"approaches:":[28],"sign-select":[29,44],"Booth":[30,45,49],"encoding":[31],"and":[32,52,109],"48-transistor":[33],"4-2":[34],"compressor":[35,72],"circuits":[36],"both":[37],"implemented":[38],"pass":[40],"logic.":[42],"The":[43,70,97],"algorithm":[46],"simplifies":[47],"selector":[50],"circuit":[51],"enables":[53],"us":[54],"to":[55],"count":[59,75,89],"45%":[61],"as":[62],"compared":[63],"that":[65],"of":[66,90,100],"conventional":[68],"one.":[69],"reduces":[73],"20%":[77],"without":[78],"speed":[79],"degradation.":[80],"By":[81],"using":[82],"these":[83],"circuits,":[85],"is":[93,105,113],"reduced":[94],"24%.":[96],"active":[98],"size":[99],"1.04/spl":[106],"times/1.27":[107],"mm":[108],"multiplication":[111],"time":[112],"4.1":[114],"ns":[115],"at":[116],"a":[117],"2.5-V":[118],"power":[119],"supply.":[120]},"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W2116764435","counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":2}],"updated_date":"2024-12-13T12:51:38.911285","created_date":"2016-06-24"}