乐胖代购免代理版

{"id":"https://openalex.org/W1985265813","doi":"https://doi.org/10.1016/j.micpro.2009.07.002","title":"Scalable register bypassing for FPGA-based processors","display_name":"Scalable register bypassing for FPGA-based processors","publication_year":2009,"publication_date":"2009-07-30","ids":{"openalex":"https://openalex.org/W1985265813","doi":"https://doi.org/10.1016/j.micpro.2009.07.002","mag":"1985265813"},"language":"en","primary_location":{"is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.micpro.2009.07.002","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},"type":"article","type_crossref":"journal-article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://www.nkavvadias.com/publications/fwding-draft.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5011453386","display_name":"Nikolaos Kavvadias","orcid":null},"institutions":[{"id":"https://openalex.org/I21370196","display_name":"Aristotle University of Thessaloniki","ror":"https://ror.org/02j61yw88","country_code":"GR","type":"education","lineage":["https://openalex.org/I21370196"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Nikolaos Kavvadias","raw_affiliation_strings":["Section of Electronics and Computers, Department of Physics , Aristotle University of Thessaloniki , 54124 Thessaloniki, Greece"],"affiliations":[{"raw_affiliation_string":"Section of Electronics and Computers, Department of Physics , Aristotle University of Thessaloniki , 54124 Thessaloniki, Greece","institution_ids":["https://openalex.org/I21370196"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023894427","display_name":"S. Nikolaidis","orcid":"https://orcid.org/0000-0002-9794-8062"},"institutions":[{"id":"https://openalex.org/I21370196","display_name":"Aristotle University of Thessaloniki","ror":"https://ror.org/02j61yw88","country_code":"GR","type":"education","lineage":["https://openalex.org/I21370196"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Spiridon Nikolaidis","raw_affiliation_strings":["Section of Electronics and Computers, Department of Physics , Aristotle University of Thessaloniki , 54124 Thessaloniki, Greece"],"affiliations":[{"raw_affiliation_string":"Section of Electronics and Computers, Department of Physics , Aristotle University of Thessaloniki , 54124 Thessaloniki, Greece","institution_ids":["https://openalex.org/I21370196"]}]}],"institution_assertions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2200,"currency":"USD","value_usd":2200,"provenance":"doaj"},"apc_paid":null,"fwci":0.0,"has_fulltext":true,"fulltext_origin":"pdf","cited_by_count":1,"citation_normalized_percentile":{"value":0.50812,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":64,"max":71},"biblio":{"volume":"33","issue":"7-8","first_page":"441","last_page":"452"},"is_retracted":false,"is_paratext":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9999,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.5715898},{"id":"https://openalex.org/keywords/processor-register","display_name":"Processor register","score":0.471281}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9383069},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.7160125},{"id":"https://openalex.org/C2779235478","wikidata":"https://www.wikidata.org/wiki/Q286576","display_name":"Register (sociolinguistics)","level":2,"score":0.7026323},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.64656895},{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.5715898},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5371374},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4869398},{"id":"https://openalex.org/C2871975","wikidata":"https://www.wikidata.org/wiki/Q187466","display_name":"Processor register","level":4,"score":0.471281},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39242324},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3048907},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.16384369},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.0},{"id":"https://openalex.org/C153247305","wikidata":"https://www.wikidata.org/wiki/Q835713","display_name":"Memory address","level":3,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"is_oa":false,"landing_page_url":"https://doi.org/10.1016/j.micpro.2009.07.002","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":false},{"is_oa":true,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.642.131","pdf_url":"http://www.nkavvadias.com/publications/fwding-draft.pdf","source":{"id":"https://openalex.org/S4306400349","display_name":"CiteSeer X (The Pennsylvania State University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I130769515","host_organization_name":"Pennsylvania State University","host_organization_lineage":["https://openalex.org/I130769515"],"host_organization_lineage_names":["Pennsylvania State University"],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false}],"best_oa_location":{"is_oa":true,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.642.131","pdf_url":"http://www.nkavvadias.com/publications/fwding-draft.pdf","source":{"id":"https://openalex.org/S4306400349","display_name":"CiteSeer X (The Pennsylvania State University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I130769515","host_organization_name":"Pennsylvania State University","host_organization_lineage":["https://openalex.org/I130769515"],"host_organization_lineage_names":["Pennsylvania State University"],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.51,"id":"https://metadata.un.org/sdg/7"}],"grants":[],"datasets":[],"versions":[],"referenced_works_count":17,"referenced_works":["https://openalex.org/W1482836228","https://openalex.org/W1538592187","https://openalex.org/W1555915743","https://openalex.org/W1566135320","https://openalex.org/W1590265020","https://openalex.org/W1686420892","https://openalex.org/W2007842093","https://openalex.org/W2051401506","https://openalex.org/W2096549000","https://openalex.org/W2119724710","https://openalex.org/W2158867373","https://openalex.org/W2163982432","https://openalex.org/W2165892109","https://openalex.org/W2168352376","https://openalex.org/W2171697422","https://openalex.org/W2725179571","https://openalex.org/W4252667818"],"related_works":["https://openalex.org/W4281749670","https://openalex.org/W3144620029","https://openalex.org/W2483419948","https://openalex.org/W2356166161","https://openalex.org/W2224192221","https://openalex.org/W2159458033","https://openalex.org/W2130533867","https://openalex.org/W2014882201","https://openalex.org/W1969937427","https://openalex.org/W1482836228"],"abstract_inverted_index":null,"cited_by_api_url":"https://api.openalex.org/works?filter=cites:W1985265813","counts_by_year":[{"year":2014,"cited_by_count":1}],"updated_date":"2024-12-09T15:40:46.948382","created_date":"2016-06-24"}