{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T14:52:48Z","timestamp":1740149568677,"version":"3.37.3"},"reference-count":29,"publisher":"MDPI AG","issue":"23","license":[{"start":{"date-parts":[[2022,12,1]],"date-time":"2022-12-01T00:00:00Z","timestamp":1669852800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"crossref","award":["92164302","440 91964204"],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"crossref"}]},{"name":"Strategic Priority Research Program of the Chinese Academy of Sciences","award":["XDB44010200"]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Sensors"],"abstract":"In this paper, a fast-transient-response NMOS low-dropout regulator (LDO) with a wide load-capacitance range was presented to provide a V\/2 read bias for cross-point memory. To utilize the large dropout voltage in the V\/2 bias scheme, a fast loop consisting of NMOS and flipped voltage amplifier (FVA) topology was adopted with a fast transient response. This design is suitable to provide a V\/2 read bias with 3.3 V input voltage and 1.65 V output voltage for different cross-point memories. The FVA-based LDO designed in the 110 nm CMOS process remained stable under a wide range of load capacitances from 0 to 10 nF and equivalent series resistance (ESR) conditions. At the capacitor-less condition, it exhibited a unity-gain bandwidth (UGB) of approximately 400 MHz at full load. For load current changes from 0 to 10 mA within an edge time of 10 ps, the simulated undershoot and settling time were only 144 mV and 50 ns, respectively. The regulator consumed 70 \u00b5A quiescent current and achieved a remarkable figure-of-merit (FOM) of 1.01 mV. At the ESR condition of a 1 \u00b5F off-chip capacitor, the simulated quiescent current, on-chip capacitor consumption, and current efficiency at full load were 8.5 \u00b5A, 2 pF, and 99.992%, respectively. The undershoot voltage was 20 mV with 800 ns settling time for a load step from 0 to 100 mA within the 10 ps edge time.<\/jats:p>","DOI":"10.3390\/s22239367","type":"journal-article","created":{"date-parts":[[2022,12,2]],"date-time":"2022-12-02T08:28:04Z","timestamp":1669969684000},"page":"9367","source":"Crossref","is-referenced-by-count":0,"title":["A Fast-Transient-Response NMOS LDO with Wide Load-Capacitance Range for Cross-Point Memory"],"prefix":"10.3390","volume":"22","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-2051-8686","authenticated-orcid":false,"given":"Luchang","family":"He","sequence":"first","affiliation":[{"name":"School of Microelectronics, University of Science and Technology of China, Hefei 230026, China"},{"name":"State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Micro-System and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China"}]},{"given":"Xi","family":"Li","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Micro-System and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4619-2525","authenticated-orcid":false,"given":"Siqiu","family":"Xu","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Micro-System and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China"}]},{"given":"Guochang","family":"Pan","sequence":"additional","affiliation":[{"name":"School of Microelectronics, University of Science and Technology of China, Hefei 230026, China"},{"name":"State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Micro-System and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China"}]},{"given":"Chenchen","family":"Xie","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Micro-System and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China"}]},{"given":"Houpeng","family":"Chen","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Micro-System and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China"}]},{"given":"Zhitang","family":"Song","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Micro-System and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China"}]}],"member":"1968","published-online":{"date-parts":[[2022,12,1]]},"reference":[{"key":"ref_1","unstructured":"(2022, September 14). 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