{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,15]],"date-time":"2024-08-15T05:14:22Z","timestamp":1723698862476},"reference-count":7,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,6,11]],"date-time":"2023-06-11T00:00:00Z","timestamp":1686441600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,6,11]],"date-time":"2023-06-11T00:00:00Z","timestamp":1686441600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,6,11]]},"DOI":"10.23919\/vlsitechnologyandcir57934.2023.10185424","type":"proceedings-article","created":{"date-parts":[[2023,7,24]],"date-time":"2023-07-24T17:36:33Z","timestamp":1690220193000},"source":"Crossref","is-referenced-by-count":4,"title":["A 2.38 MCells\/mm2<\/sup> 9.81 -350 TOPS\/W RRAM Compute-in-Memory Macro in 40nm CMOS with Hybrid Offset\/IOFF<\/sub> Cancellation and ICELL<\/sub> RBLSL<\/sub> Drop Mitigation"],"prefix":"10.23919","author":[{"given":"Samuel D.","family":"Spetalnick","sequence":"first","affiliation":[{"name":"Georgia Institute of Technology,Atlanta,GA,USA"}]},{"given":"Muya","family":"Chang","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology,Atlanta,GA,USA"}]},{"given":"Shota","family":"Konno","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology,Atlanta,GA,USA"}]},{"given":"Brian","family":"Crafton","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology,Atlanta,GA,USA"}]},{"given":"Ashwin S.","family":"Lele","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology,Atlanta,GA,USA"}]},{"given":"Win-San","family":"Khwa","sequence":"additional","affiliation":[{"name":"TSMC Corporate Research,Hsinchu,Taiwan"}]},{"given":"Yu-Der","family":"Chih","sequence":"additional","affiliation":[{"name":"TSMC Design Technology,Hsinchu,Taiwan"}]},{"given":"Meng-Fan","family":"Chang","sequence":"additional","affiliation":[{"name":"TSMC Corporate Research,Hsinchu,Taiwan"}]},{"given":"Arijit","family":"Raychowdhury","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology,Atlanta,GA,USA"}]}],"member":"263","reference":[{"key":"ref7","first-page":"1","author":"crafton","year":"2021","journal-title":"ASSCC"},{"key":"ref4","first-page":"245","author":"xue","year":"2021","journal-title":"ISSCC"},{"key":"ref3","first-page":"264","author":"correll","year":"2022","journal-title":"VLSI"},{"key":"ref6","first-page":"244","author":"xue","year":"2020","journal-title":"ISSCC"},{"key":"ref5","first-page":"404","author":"yoon","year":"2021","journal-title":"ISSCC"},{"key":"ref2","first-page":"1","author":"spetalnick","year":"2022","journal-title":"ISSCC"},{"key":"ref1","first-page":"1","author":"hung","year":"2022","journal-title":"ISSCC"}],"event":{"name":"2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","location":"Kyoto, Japan","start":{"date-parts":[[2023,6,11]]},"end":{"date-parts":[[2023,6,16]]}},"container-title":["2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10185199\/10185158\/10185424.pdf?arnumber=10185424","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,12,11]],"date-time":"2023-12-11T19:02:31Z","timestamp":1702321351000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10185424\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,6,11]]},"references-count":7,"URL":"https:\/\/doi.org\/10.23919\/vlsitechnologyandcir57934.2023.10185424","relation":{},"subject":[],"published":{"date-parts":[[2023,6,11]]}}}