{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,1]],"date-time":"2022-04-01T06:59:51Z","timestamp":1648796391059},"reference-count":17,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"12","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Trans. Fundamentals"],"published-print":{"date-parts":[[2011]]},"DOI":"10.1587\/transfun.e94.a.2545","type":"journal-article","created":{"date-parts":[[2011,12,2]],"date-time":"2011-12-02T14:19:38Z","timestamp":1322835578000},"page":"2545-2553","source":"Crossref","is-referenced-by-count":1,"title":["Stress Probability Computation for Estimating NBTI-Induced Delay Degradation"],"prefix":"10.1587","volume":"E94-A","author":[{"given":"Hiroaki","family":"KONOURA","sequence":"first","affiliation":[{"name":"Department of Information Systems Engineering, Osaka University"},{"name":"JST, CREST"}]},{"given":"Yukio","family":"MITSUYAMA","sequence":"additional","affiliation":[{"name":"School of Systems Engineering, Kochi University of Technology"},{"name":"JST, CREST"}]},{"given":"Masanori","family":"HASHIMOTO","sequence":"additional","affiliation":[{"name":"Department of Information Systems Engineering, Osaka University"},{"name":"JST, CREST"}]},{"given":"Takao","family":"ONOYE","sequence":"additional","affiliation":[{"name":"Department of Information Systems Engineering, Osaka University"},{"name":"JST, CREST"}]}],"member":"532","reference":[{"key":"1","unstructured":"[1] S. Bhardwaj, W. Wang, R. Vattikonda, Y. Cao, and S. Vrudhula, “Predictive modeling of the NBTI effect for reliable design,” Proc. CICC, pp.1047-1052, Aug. 2006."},{"key":"2","doi-asserted-by":"crossref","unstructured":"[2] W. Wang, S. Yang, S. Bhardwaj, S. Vrudhula, F. Liu, and Y. Cao, “The impact of NBTI effect on combinational circuit: modeling, simulation, and analysis,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol.18, no.2, pp.173-183, Feb. 2010.","DOI":"10.1109\/TVLSI.2008.2008810"},{"key":"3","doi-asserted-by":"crossref","unstructured":"[3] W. Wang, S. Yang, S. Bhardwaj, R. Vattikonda, S. Vrudhula, F. Liu, and Y. Cao, “The impact of NBTI on the performance of combinational and sequential circuits,” Proc. ASP-DAC, pp.364-369, Jan. 2007.","DOI":"10.1109\/DAC.2007.375188"},{"key":"4","doi-asserted-by":"crossref","unstructured":"[4] B. Zhang and M. Orshansky, “Modeling of NBTI-induced PMOS degradation under arbitrary dynamic temperature variation,” Proc. ISQED, pp.748-779, March 2008.","DOI":"10.1109\/ISQED.2008.4479836"},{"key":"5","doi-asserted-by":"crossref","unstructured":"[5] A. Stempkovsky, A. Glebov, and S. Gavrilov, “Calculation of stress probability for NBTI-aware timing analysis,” Proc. ISQED, pp.714-718, March 2009.","DOI":"10.1109\/ISQED.2009.4810381"},{"key":"6","doi-asserted-by":"crossref","unstructured":"[6] W. Wang, S. Yang, and Y. Cao, “Node criticality computation for circuit timing analysis and optimization under NBTI effect,” Proc. ISQED, pp.763-768, March 2008.","DOI":"10.1109\/ISQED.2008.4479834"},{"key":"7","unstructured":"[7] S. Mahapatra, M.A. Alam, P. Bharath, T.R. Dalei, and D. Saha, “Mechanism of negative bias temperature instability in CMOS devices: Degradation, recovery and impact of nitrogen,” Proc. IEDM, pp.105-108, Dec. 2004."},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2004.03.019"},{"key":"9","doi-asserted-by":"crossref","unstructured":"[9] J.H. Lee, W.H. Wu, A.E. Islam, M.A. Alam and A.S. Oates, “Separation method of hole trapping and interface trap generation and their roles in NBTI reaction-diffusion model,” Proc. IRPS, pp.745-746, April 2008.","DOI":"10.1109\/RELPHY.2008.4559018"},{"key":"10","doi-asserted-by":"crossref","unstructured":"[10] T. Grasser, B. Kachzr, W. Goes, T. Aichinger, P. Hehenberger, and M. Nelhiebel, “A two-stage model for negative bias temperature instability,” Proc. IRPS, pp.33-44, April 2009.","DOI":"10.1109\/IRPS.2009.5173221"},{"key":"11","unstructured":"[11] A.T. Krishnan, C. Chansellor, S. Chakravarthi, P.E. Nicollian, V. Reddy, A. Varghese, R.B. Khamankar, and S. Krishnan, “Material dependence of hydrogen diffusion: Implications for NBTI degradation,” Proc. IEDM, pp.688-691, Dec. 2005."},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2007.910130"},{"key":"13","unstructured":"[13] Y. Cao, “Reliability mechanisms and the impact on IC designs,” Proc. ASP-DAC, Tutorial 4, pp.342-372, Jan. 2009."},{"key":"14","unstructured":"[14] W. Wang, Z. Wei, S. Yang, and Y. Cao, “An efficient method to identify critical gates under circuit aging,” Proc. ICCAD, pp.735-740, Sept. 2007."},{"key":"15","doi-asserted-by":"crossref","unstructured":"[15] F.N. Najm, “Transition density, a stochastic measure of activity in digital circuits,” Proc. DAC, pp.644-649, June 1991.","DOI":"10.1145\/127601.127744"},{"key":"16","unstructured":"[16] Open Cores, “http:\/\/www.opencores.org\/”"},{"key":"17","unstructured":"[17] Synopsys, Inc.: NanoTime and NanoTime Ultra User Guide, June 2009."}],"container-title":["IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/www.jstage.jst.go.jp\/article\/transfun\/E94.A\/12\/E94.A_12_2545\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,26]],"date-time":"2021-04-26T05:44:54Z","timestamp":1619415894000},"score":1,"resource":{"primary":{"URL":"http:\/\/www.jstage.jst.go.jp\/article\/transfun\/E94.A\/12\/E94.A_12_2545\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011]]},"references-count":17,"journal-issue":{"issue":"12","published-print":{"date-parts":[[2011]]}},"URL":"https:\/\/doi.org\/10.1587\/transfun.e94.a.2545","relation":{},"ISSN":["0916-8508","1745-1337"],"issn-type":[{"value":"0916-8508","type":"print"},{"value":"1745-1337","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011]]}}}