乐胖代购免代理版

{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,7,10]],"date-time":"2024-07-10T23:14:32Z","timestamp":1720653272429},"reference-count":32,"publisher":"Institute of Electronics, Information and Communications Engineers (IEICE)","issue":"1","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEICE Trans. Electron."],"published-print":{"date-parts":[[2016]]},"DOI":"10.1587\/transele.e99.c.108","type":"journal-article","created":{"date-parts":[[2015,12,31]],"date-time":"2015-12-31T22:14:04Z","timestamp":1451600044000},"page":"108-118","source":"Crossref","is-referenced-by-count":2,"title":["An Analytical Model of AC-DC Charge Pump Voltage Multipliers"],"prefix":"10.1587","volume":"E99.C","author":[{"given":"Toru","family":"TANZAWA","sequence":"first","affiliation":[{"name":"Micron Memory Japan, Inc."}]}],"member":"532","reference":[{"key":"1","doi-asserted-by":"crossref","unstructured":"[1] J.F. Dickson, \u201cOn-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique,\u201d IEEE J. Solid-State Circuits, vol.11, no.3, pp.374-378, June 1976.","DOI":"10.1109\/JSSC.1976.1050739"},{"key":"2","doi-asserted-by":"crossref","unstructured":"[2] T. Tanzawa, \u201cSystem Overview and Key Design Considerations,\u201d in On-chip High-Voltage Generator Design, Springer, New York, 2013.","DOI":"10.1007\/978-1-4614-3849-6"},{"key":"3","doi-asserted-by":"crossref","unstructured":"[3] Y. Manoli, \u201cEnergy harvesting \u2014 from devices to systems,\u201d IEEE ESSCIRC Digest of Technical Paper, pp.27-36, Sept. 2010.","DOI":"10.1109\/ESSCIRC.2010.5619870"},{"key":"4","unstructured":"[4] T. Umeda, H. Yoshida, S. Sekine, Y. Fujita, T. Suzuki, and S. Otaka, \u201cA 950 MHz rectifier circuit for sensor networks with 10 m-distance,\u201d ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005., pp.256-258, 2005."},{"key":"5","doi-asserted-by":"crossref","unstructured":"[5] S. Meninger, J.O. Mur-Miranda, R. Amirtharajah, A. Chandrakasan, and J.H. Lang, \u201cVibration-to-electric energy conversion,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol.9, no.1, pp.64-76, Jan. 2001.","DOI":"10.1109\/92.920820"},{"key":"6","doi-asserted-by":"crossref","unstructured":"[6] D. Guyomar, A. Badel, E. Lefeuvre, and C. Richard, \u201cToward energy harvesting using active materials and conversion improvement by nonlinear processing,\u201d IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control, vol.52, no.4, pp.584-595, April 2005.","DOI":"10.1109\/TUFFC.2005.1428041"},{"key":"7","doi-asserted-by":"crossref","unstructured":"[7] G. Papotto, F. Carrara, and G. Palmisano, \u201cA 90-nm CMOS Threshold-Compensated RF Energy Harvester,\u201d IEEE J. Solid-State Circuits, vol.46, no.9, pp.1985-1997, Sept. 2011.","DOI":"10.1109\/JSSC.2011.2157010"},{"key":"8","doi-asserted-by":"crossref","unstructured":"[8] J.S. Witters, G. Groeseneken, and H.E. Maes, \u201cAnalysis and modeling of on-chip high-voltage generator circuits for use in EEPROM circuits,\u201d IEEE J. Solid-State Circuits, vol.24, no.5, pp.1372-1380, Oct. 1989.","DOI":"10.1109\/JSSC.1989.572617"},{"key":"9","doi-asserted-by":"crossref","unstructured":"[9] G.D. Cataldo and G. Palumbo, \u201cDouble and triple charge pump for power IC: dynamic models which take parasitic effects into account,\u201d IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol.40, no.2, pp.92-101, Feb. 1993.","DOI":"10.1109\/81.219823"},{"key":"10","doi-asserted-by":"crossref","unstructured":"[10] T. Tanzawa and T. Tanaka, \u201cA dynamic analysis of the Dickson charge pump circuit,\u201d IEEE J. Solid-State Circuits, vol.32, no.8, pp.1231-1240, Aug. 1997.","DOI":"10.1109\/4.604079"},{"key":"11","doi-asserted-by":"crossref","unstructured":"[11] T. Tanzawa and S. Atsumi, \u201cOptimization of word-line booster circuits for low-voltage Flash memories,\u201d IEEE J. Solid-State Circuits, vol.34, no.8, pp.1091-1098, Aug. 1999.","DOI":"10.1109\/4.777107"},{"key":"12","unstructured":"[12] G. Palumbo, D. Pappalardo, and M. Gaibotti, \u201cCharge-pump circuits: power-consumption optimization,\u201d IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol.49, no.11, pp.1535-1542, Nov. 2002."},{"key":"13","unstructured":"[13] T. Tanzawa, \u201cDickson charge pump circuit design with parasitic resistance in power lines,\u201d IEEE International Symposium on Circuits and Systems, pp.1763-1766, June 2009."},{"key":"14","doi-asserted-by":"crossref","unstructured":"[14] G. Palumbo and D. Pappalardo, \u201cCharge Pump Circuits: An overview on design strategies and topologies,\u201d IEEE Circuits Syst. Mag., vol.10, no.1, pp.31-45, Jan. 2010.","DOI":"10.1109\/MCAS.2009.935695"},{"key":"15","unstructured":"[15] T. Tanzawa, \u201cOn two-phase switched-capacitor multipliers with minimum circuit area,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers, vol.57, no.10, pp.2602-2608, Oct. 2010."},{"key":"16","doi-asserted-by":"crossref","unstructured":"[16] T. Tanzawa, \u201cA switch-resistance-aware Dickson charge pump model for optimizing clock frequency,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs, vol.58, no.6, pp.336-340, June 2011.","DOI":"10.1109\/TCSII.2011.2158166"},{"key":"17","doi-asserted-by":"crossref","unstructured":"[17] T. Tanzawa, \u201cA behavior model of a Dickson charge pump circuit for designing a multiple charge pump system distributed in LSIs,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs, vol.57, no.7, pp.527-530, July 2010.","DOI":"10.1109\/TCSII.2010.2048482"},{"key":"18","unstructured":"[18] T. Tanzawa, \u201cA behavior model of an on-chip high voltage generator for fast, system-level simulation,\u201d IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol.20, no.12, pp.2351-2355, Dec. 2012."},{"key":"19","doi-asserted-by":"crossref","unstructured":"[19] T. Tanzawa, \u201cAn Optimum Design for Integrated Switched-Capacitor Dickson Charge Pump Multipliers With Area Power Balance,\u201d IEEE Trans. Power Electron., vol.29, no.2, pp.534-538, 2014.","DOI":"10.1109\/TPEL.2013.2271279"},{"key":"20","doi-asserted-by":"crossref","unstructured":"[20] R.J. Gutmann and J.M. Borrego, \u201cPower Combining in an Array of Microwave Power Rectifiers,\u201d IEEE Trans. Microw. Theory Techn., vol.27, no.12, pp.958-968, Dec. 1979.","DOI":"10.1109\/TMTT.1979.1129774"},{"key":"21","doi-asserted-by":"crossref","unstructured":"[21] T.-W. Yoo and K. Chang, \u201cTheoretical and experimental development of 10 and 35 GHz rectennas,\u201d IEEE Trans. Microw. Theory Techn., vol.40, no.6, pp.1259-1266, June 1992.","DOI":"10.1109\/22.141359"},{"key":"22","doi-asserted-by":"crossref","unstructured":"[22] G. De Vita and G. Iannaccon, \u201cDesign criteria for the RF section of UHF and microwave passive RFID transponders,\u201d IEEE Trans. Microw. Theory Techn., vol.53, no.9, pp.2978-2990, Sept. 2005.","DOI":"10.1109\/TMTT.2005.854229"},{"key":"23","doi-asserted-by":"crossref","unstructured":"[23] R.E. Barnett, J. Liu, and S. Lazar, \u201cA RF to DC voltage conversion model for multi-stage rectifiers in UHF RFID transponders,\u201d IEEE J. Solid-State Circuits, vol.44, no.2, pp.354-370, Feb. 2009.","DOI":"10.1109\/JSSC.2008.2010991"},{"key":"24","doi-asserted-by":"crossref","unstructured":"[24] J. Yi, W.-H. Ki, and C.-Y. Tsui, \u201cAnalysis and design strategy of UHF micro-power CMOS rectifiers for micro-sensor and RFID applications,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers, vol.54, no.1, pp.153-166, Jan. 2007.","DOI":"10.1109\/TCSI.2006.887974"},{"key":"25","doi-asserted-by":"crossref","unstructured":"[25] A.J. Cardoso, L.G. de Carli, C. Galup-Montoro, and M.C.Schneider, \u201cAnalysis of the Rectifier Circuit Valid Down to Its Low-Voltage Limit,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers, vol.59, no.1, pp.106-112, Jan. 2012.","DOI":"10.1109\/TCSI.2011.2161366"},{"key":"26","doi-asserted-by":"crossref","unstructured":"[26] H. Raben, J. Borg, and J. Johansson, \u201cA Model for MOS Diodes With Vth Cancellation in RFID Rectifiers,\u201d IEEE Trans. Circuits Syst. II, Exp. Briefs, vol.59, no.11, pp.761-765, Nov. 2012.","DOI":"10.1109\/TCSII.2012.2220691"},{"key":"27","unstructured":"[27] A. Mansano, S. Bagga, and W. Serdijn, \u201cA High Efficiency Orthogonally Switching Passive Charge Pump Rectifier for Energy Harvesters,\u201d IEEE Trans. Circuits Syst. I, Reg. Papers, vol.60, no.7, pp.1959-1966, July 2013."},{"key":"28","doi-asserted-by":"crossref","unstructured":"[28] A.J. Cardoso, M.C. Schneider, and C.G. Montoro, \u201cDesign of very low voltage CMOS rectifier circuits,\u201d IEEE Circuits and Systems for Medical and Environmental Applications Workshop (CASME), pp.1-4, Dec. 2010.","DOI":"10.1109\/CASME.2010.5706674"},{"key":"29","doi-asserted-by":"crossref","unstructured":"[29] A.J. Cardoso, M.C. Schneider, and C.G. Montoro, \u201cTeaching low voltage electronics: the case of the rectifier circuit,\u201d IEEE International Conference on Microelectronic Systems Education (MSE), pp.29-30, June 2011.","DOI":"10.1109\/MSE.2011.5937084"},{"key":"30","unstructured":"[30] J.P. Curty, M. Declercq, C. Dehollain, and N. Joehl, \u201cAnalysis of the Modified-Greinacher Rectifier,\u201d in Design and Optimization of Passive UHF RFID Systems, Springer, New York, 2007."},{"key":"31","doi-asserted-by":"crossref","unstructured":"[31] T. Sakurai and A.R. Newton, \u201cAlpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas,\u201d IEEE J. Solid-State Circuits, vol.25, no.2, pp.584-594, Feb. 1990.","DOI":"10.1109\/4.52187"},{"key":"32","doi-asserted-by":"crossref","unstructured":"[32] T. Tanzawa, \u201cAn analytical model of AC-DC voltage multipliers,\u201d IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp.323-326, Dec. 2014.","DOI":"10.1109\/ICECS.2014.7049987"}],"container-title":["IEICE Transactions on Electronics"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transele\/E99.C\/1\/E99.C_108\/_pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,9,3]],"date-time":"2019-09-03T03:49:17Z","timestamp":1567482557000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.jstage.jst.go.jp\/article\/transele\/E99.C\/1\/E99.C_108\/_article"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016]]},"references-count":32,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2016]]}},"URL":"https:\/\/doi.org\/10.1587\/transele.e99.c.108","relation":{},"ISSN":["0916-8524","1745-1353"],"issn-type":[{"value":"0916-8524","type":"print"},{"value":"1745-1353","type":"electronic"}],"subject":[],"published":{"date-parts":[[2016]]}}}