{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,8]],"date-time":"2024-08-08T04:10:02Z","timestamp":1723090202508},"reference-count":0,"publisher":"Wiley","issue":"2","license":[{"start":{"date-parts":[[2000,1,1]],"date-time":"2000-01-01T00:00:00Z","timestamp":946684800000},"content-version":"vor","delay-in-days":2191,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[1994,1]]},"abstract":"In this paper, we present a novel concept of the general connectivity among cells. While conventional concept\nconsiders direct connections only, the new concept considers both the direct and indirect connections among cells\nleading to a model capturing a more precise relationship among cells. Based on the model, a new parallel clustering\napproach is proposed and analyzed. Another new concept of the stable cluster is introduced to improve the\nclustering result. In conjunction with the clustering process, an investigatory procedure which back tracks the\ncluster development process to check if all clusters are stable is also developed. Initial test runs, using the new\nclustering approach for placement, yield an encouraging 21.6% reduction on the number of feed\u2010throughs in a\ncomplex ASIC design.<\/jats:p>","DOI":"10.1155\/1994\/17320","type":"journal-article","created":{"date-parts":[[2007,9,18]],"date-time":"2007-09-18T12:56:35Z","timestamp":1190120195000},"page":"131-141","source":"Crossref","is-referenced-by-count":5,"title":["A New Clustering Method Based onGeneral Connectivity"],"prefix":"10.1155","volume":"2","author":[{"given":"Wenjun","family":"Zhuang","sequence":"first","affiliation":[]},{"given":"Yong Ching","family":"Lim","sequence":"additional","affiliation":[]},{"given":"Ganesh","family":"Samudra","sequence":"additional","affiliation":[]},{"given":"Neng","family":"Yan","sequence":"additional","affiliation":[]}],"member":"311","published-online":{"date-parts":[[1994,1]]},"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/1994\/017320.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1155\/1994\/17320","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,8]],"date-time":"2024-08-08T03:50:38Z","timestamp":1723089038000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1155\/1994\/17320"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1994,1]]},"references-count":0,"journal-issue":{"issue":"2","published-print":{"date-parts":[[1994,1]]}},"alternative-id":["10.1155\/1994\/17320"],"URL":"https:\/\/doi.org\/10.1155\/1994\/17320","archive":["Portico"],"relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"type":"print","value":"1065-514X"},{"type":"electronic","value":"1563-5171"}],"subject":[],"published":{"date-parts":[[1994,1]]}}}