乐胖代购免代理版

{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,24]],"date-time":"2025-03-24T06:43:50Z","timestamp":1742798630060,"version":"3.28.0"},"publisher-location":"New York, NY, USA","reference-count":21,"publisher":"ACM","content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2004,6,7]]},"DOI":"10.1145\/996566.996774","type":"proceedings-article","created":{"date-parts":[[2004,7,20]],"date-time":"2004-07-20T11:55:38Z","timestamp":1090324538000},"page":"767-772","update-policy":"http:\/\/dx.doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":9,"title":["Implicit pseudo boolean enumeration algorithms for input vector control"],"prefix":"10.1145","author":[{"given":"Kaviraj","family":"Chopra","sequence":"first","affiliation":[{"name":"University of Arizona"}]},{"given":"Sarma B. K.","family":"Vrudhula","sequence":"additional","affiliation":[{"name":"University of Arizona"}]}],"member":"320","published-online":{"date-parts":[[2004,6,7]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/566408.566460"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1016\/0167-9260(95)00008-4"},{"key":"e_1_3_2_1_3_1","volume-title":"Algebraic decision diagrams and their applications,\" in Proc. of IEEE ICCAD","author":"Bahar R. I.","year":"1993","unstructured":"R. I. Bahar , , \" Algebraic decision diagrams and their applications,\" in Proc. of IEEE ICCAD ., 1993 . R. I. Bahar, et al., \"Algebraic decision diagrams and their applications,\" in Proc. of IEEE ICCAD., 1993."},{"key":"e_1_3_2_1_4_1","volume-title":"Proc. IEEE AVWLPD.","author":"S. Bobba","year":"1999","unstructured":"S. Bobba , Maximum Leakage Power Estimation for CMOS Circuits ,\" in Proc. IEEE AVWLPD. , 1999 . S. Bobba , et al., \"Maximum Leakage Power Estimation for CMOS Circuits,\" in Proc. IEEE AVWLPD., 1999."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/123186.123222"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1986.1676819"},{"key":"e_1_3_2_1_7_1","volume-title":"Multi-terminal BDDs: An efficient data structure for matrix representation,\" in Proc. of (IWLS)","author":"Clarke E.","year":"1993","unstructured":"E. Clarke , , \" Multi-terminal BDDs: An efficient data structure for matrix representation,\" in Proc. of (IWLS) ., 1993 . E. Clarke, et al., \"Multi-terminal BDDs: An efficient data structure for matrix representation,\" in Proc. of (IWLS)., 1993."},{"key":"e_1_3_2_1_8_1","volume-title":"A Unified Framework for the Formal Verification of Sequential Circuits,\" in Proc. of IEEE ICCAD","author":"Coudert O.","year":"1990","unstructured":"O. Coudert , , \" A Unified Framework for the Formal Verification of Sequential Circuits,\" in Proc. of IEEE ICCAD ., 1990 . O. Coudert, et al., \"A Unified Framework for the Formal Verification of Sequential Circuits,\" in Proc. of IEEE ICCAD., 1990."},{"key":"e_1_3_2_1_9_1","volume-title":"Proc. of PATMOS.","author":"Fadi A.","year":"2002","unstructured":"A. Fadi , Robust SAT- Based Search Algorithm for Leakage Power Reduction ,\" in Proc. of PATMOS. , 2002 . A. Fadi, et al., \"Robust SAT-Based Search Algorithm for Leakage Power Reduction,\" in Proc. of PATMOS., 2002."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2002.1004317"},{"key":"e_1_3_2_1_11_1","volume-title":"Proc. of IEEE ICCAD.","author":"Gupta A.","year":"2001","unstructured":"A. Gupta , Partition Based Decision Heuristics for Image Computation Using SAT and BD Ds ,\" in Proc. of IEEE ICCAD. , 2001 . A. Gupta, et al., \"Partition Based Decision Heuristics for Image Computation Using SAT and BDDs,\" in Proc. of IEEE ICCAD., 2001."},{"key":"e_1_3_2_1_12_1","volume-title":"Proc. of IEEE CICC.","author":"Halter J.","year":"1997","unstructured":"J. Halter , A Gate-Level Leakage Power Reduction Method for Ultra-Low-Power CMOS Circuits ,\" in Proc. of IEEE CICC. , 1997 . J. Halter, et al., \"A Gate-Level Leakage Power Reduction Method for Ultra-Low-Power CMOS Circuits,\" in Proc. of IEEE CICC., 1997."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/43.766723"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/266021.266273"},{"key":"e_1_3_2_1_15_1","volume-title":"Edge-valued binary decision diagrams for multi-level hierarchical verification,\" in ACM","author":"Lai Y.-T.","year":"1992","unstructured":"Y.-T. Lai , \" Edge-valued binary decision diagrams for multi-level hierarchical verification,\" in ACM , IEEE Proc of DAC , 1992 . Y.-T. Lai et al., \"Edge-valued binary decision diagrams for multi-level hierarchical verification,\" in ACM,IEEE Proc of DAC, 1992."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775878"},{"key":"e_1_3_2_1_17_1","volume":"200","author":"Roy K.","unstructured":"K. Roy , , \"Leakage Current Mech. and Leakage Reduction Techniques in Deep-Submicron CMOS Circuits ,\" in IEEE Trans of CAD. , 200 3. K. Roy, et al., \"Leakage Current Mech. and Leakage Reduction Techniques in Deep-Submicron CMOS Circuits ,\" in IEEE Trans of CAD., 2003.","journal-title":"\"Leakage Current Mech. and Leakage Reduction Techniques in Deep-Submicron CMOS Circuits ,\" in IEEE Trans of CAD."},{"volume-title":"CU Decision Diagram Package, 2.3.1.,\" ECE Dept","author":"Somenzi F.","key":"e_1_3_2_1_18_1","unstructured":"F. Somenzi ,\"CUDD : CU Decision Diagram Package, 2.3.1.,\" ECE Dept ., Univ. of Colorado , Boulder . F. Somenzi,\"CUDD: CU Decision Diagram Package, 2.3.1.,\" ECE Dept., Univ. of Colorado, Boulder."},{"key":"e_1_3_2_1_19_1","volume-title":"Springer-Verlag.","author":"Software International Journal","year":"2001","unstructured":"\" International Journal of Software Tools for Technology Transfer ,\" in Special issue on Decision Diagrams . Springer-Verlag. , 2001 . \"International Journal of Software Tools for Technology Transfer,\" in Special issue on Decision Diagrams. Springer-Verlag., 2001."},{"key":"e_1_3_2_1_20_1","volume-title":"Implicit state enumeration of finite state machines using BDDs,\" in Proc. of IEEE ICCAD","author":"H. Touati","year":"1990","unstructured":"H. Touati et al. , \" Implicit state enumeration of finite state machines using BDDs,\" in Proc. of IEEE ICCAD ., 1990 . H. Touati et al., \" Implicit state enumeration of finite state machines using BDDs,\" in Proc. of IEEE ICCAD., 1990."},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/43.644030"}],"event":{"name":"DAC04: The 41st Annual Design Automation Conference 2004","sponsor":["ACM Association for Computing Machinery","SIGDA ACM Special Interest Group on Design Automation"],"location":"San Diego CA USA","acronym":"DAC04"},"container-title":["Proceedings of the 41st annual Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/996566.996774","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,9,4]],"date-time":"2023-09-04T15:05:40Z","timestamp":1693839940000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/996566.996774"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004,6,7]]},"references-count":21,"alternative-id":["10.1145\/996566.996774","10.1145\/996566"],"URL":"https:\/\/doi.org\/10.1145\/996566.996774","relation":{},"subject":[],"published":{"date-parts":[[2004,6,7]]},"assertion":[{"value":"2004-06-07","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}