{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,29]],"date-time":"2024-08-29T21:13:24Z","timestamp":1724966004398},"publisher-location":"New York, NY, USA","reference-count":20,"publisher":"ACM","content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2002,6,22]]},"DOI":"10.1145\/514191.514200","type":"proceedings-article","created":{"date-parts":[[2004,4,19]],"date-time":"2004-04-19T17:18:43Z","timestamp":1082395123000},"update-policy":"http:\/\/dx.doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":92,"title":["Critical power slope"],"prefix":"10.1145","author":[{"given":"Akihiko","family":"Miyoshi","sequence":"first","affiliation":[{"name":"Carnegie Mellon University"}]},{"given":"Charles","family":"Lefurgy","sequence":"additional","affiliation":[{"name":"Austin Research Laboratory"}]},{"given":"Eric","family":"Van Hensbergen","sequence":"additional","affiliation":[{"name":"Austin Research Laboratory"}]},{"given":"Ram","family":"Rajamony","sequence":"additional","affiliation":[{"name":"Austin Research Laboratory"}]},{"given":"Raj","family":"Rajkumar","sequence":"additional","affiliation":[{"name":"Carnegie Mellon University"}]}],"member":"320","published-online":{"date-parts":[[2002,6,22]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"Advanced Configuration and Power Interface Specification 2001. http:\/\/www.teleport.com\/~acpi\/spec.htm.]] Advanced Configuration and Power Interface Specification 2001. http:\/\/www.teleport.com\/~acpi\/spec.htm.]]"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.5555\/783060.783075"},{"key":"e_1_3_2_1_3_1","volume-title":"Proceedings of the 28th Hawaii International Conference on System Sciences","author":"Burd T. D.","year":"1995","unstructured":"T. D. Burd and R. W. Brodersen . Energy efficientCMOS microprocessor design . In Proceedings of the 28th Hawaii International Conference on System Sciences , Jan. 1995 .]] T. D. Burd and R. W. Brodersen. Energy efficientCMOS microprocessor design. In Proceedings of the 28th Hawaii International Conference on System Sciences, Jan. 1995.]]"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/502034.502045"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/339331.339421"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/381677.381702"},{"key":"e_1_3_2_1_7_1","volume-title":"Jan.","author":"Fleischmann M.","year":"2001","unstructured":"M. Fleischmann . Dynamic Power Management for Crusoe Processors , Jan. 2001 . http:\/\/www.transmeta.com\/.]] M. Fleischmann. Dynamic Power Management for Crusoe Processors, Jan. 2001. http:\/\/www.transmeta.com\/.]]"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/319151.319155"},{"key":"e_1_3_2_1_9_1","volume-title":"Proceedings of the Fourth Symposium on Operating Systems Design and Implementation","author":"Grunwald D.","year":"2000","unstructured":"D. Grunwald , P. Levis , K. Farkas , C. Morrey , and M. Neufeld . Policies for dynamic clock scheduling . In Proceedings of the Fourth Symposium on Operating Systems Design and Implementation , Oct. 2000 .]] D. Grunwald, P. Levis, K. Farkas, C. Morrey, and M. Neufeld. Policies for dynamic clock scheduling. In Proceedings of the Fourth Symposium on Operating Systems Design and Implementation, Oct. 2000.]]"},{"key":"e_1_3_2_1_10_1","volume-title":"Mobile Intel Pentium III Processor in BGA2 and MicroPGA2 Packages","year":"2001","unstructured":"Intel. Mobile Intel Pentium III Processor in BGA2 and MicroPGA2 Packages , 2001 . Order Number 283653-002.]] Intel. Mobile Intel Pentium III Processor in BGA2 and MicroPGA2 Packages, 2001. Order Number 283653-002.]]"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/378993.379007"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.743684"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/378420.378429"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/306225.306235"},{"key":"e_1_3_2_1_15_1","volume-title":"Proceedings of Workshop on Compiler and OS for Low Power (COLP)","author":"Mosse D.","year":"2000","unstructured":"D. Mosse , H. Aydin , B. Childers , and R. Melhem . Compiler-assisted dynamic power-aware scheduling for real-time applications . In Proceedings of Workshop on Compiler and OS for Low Power (COLP) , Oct. 2000 .]] D. Mosse, H. Aydin, B. Childers, and R. Melhem. Compiler-assisted dynamic power-aware scheduling for real-time applications. In Proceedings of Workshop on Compiler and OS for Low Power (COLP), Oct. 2000.]]"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.917539"},{"key":"e_1_3_2_1_17_1","volume-title":"Power Driven Microarchitecture Workshop","author":"Pering T.","year":"1998","unstructured":"T. Pering , T. Burd , and R. Brodersen . Dynamic voltage scaling and the design of a low-power microprocessor system . In Power Driven Microarchitecture Workshop , June 1998 .]] T. Pering, T. Burd, and R. Brodersen. Dynamic voltage scaling and the design of a low-power microprocessor system. In Power Driven Microarchitecture Workshop, June 1998.]]"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/502034.502044"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/381677.381701"},{"key":"e_1_3_2_1_20_1","volume-title":"Proceedings of the Symposium on Operating Systems Design and Implementation","author":"Weiser M.","year":"1994","unstructured":"M. Weiser , B. Welch , A. Demers , and S. Shenker . Scheduling for reduced CPU energy . In Proceedings of the Symposium on Operating Systems Design and Implementation , Nov. 1994 .]] M. Weiser, B. Welch, A. Demers, and S. Shenker. Scheduling for reduced CPU energy. In Proceedings of the Symposium on Operating Systems Design and Implementation, Nov. 1994.]]"}],"event":{"name":"ICS02: International Conference on Supercomputing","location":"New York New York USA","acronym":"ICS02","sponsor":["SIGARCH ACM Special Interest Group on Computer Architecture"]},"container-title":["Proceedings of the 16th international conference on Supercomputing"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/514191.514200","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,1,8]],"date-time":"2023-01-08T21:19:56Z","timestamp":1673212796000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/514191.514200"}},"subtitle":["understanding the runtime effects of frequency scaling"],"short-title":[],"issued":{"date-parts":[[2002,6,22]]},"references-count":20,"alternative-id":["10.1145\/514191.514200","10.1145\/514191"],"URL":"https:\/\/doi.org\/10.1145\/514191.514200","relation":{},"subject":[],"published":{"date-parts":[[2002,6,22]]},"assertion":[{"value":"2002-06-22","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}