{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,29]],"date-time":"2024-08-29T21:13:15Z","timestamp":1724965995644},"publisher-location":"New York, NY, USA","reference-count":59,"publisher":"ACM","funder":[{"name":"MOE","award":["A-0008452-00-00"]},{"name":"ODPRT","award":["A-0008089-00-00"]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2022,8,22]]},"DOI":"10.1145\/3544216.3544253","type":"proceedings-article","created":{"date-parts":[[2022,8,11]],"date-time":"2022-08-11T22:58:16Z","timestamp":1660258696000},"update-policy":"http:\/\/dx.doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":6,"title":["SimBricks"],"prefix":"10.1145","author":[{"ORCID":"http:\/\/orcid.org\/0000-0001-6930-2419","authenticated-orcid":false,"given":"Hejing","family":"Li","sequence":"first","affiliation":[{"name":"Max Planck Institute for Software Systems (MPI-SWS), Saarbr\u00fccken, Germany"}]},{"ORCID":"http:\/\/orcid.org\/0000-0003-3530-7662","authenticated-orcid":false,"given":"Jialin","family":"Li","sequence":"additional","affiliation":[{"name":"National University of Singapore, Singapore"}]},{"ORCID":"http:\/\/orcid.org\/0000-0002-6355-2772","authenticated-orcid":false,"given":"Antoine","family":"Kaufmann","sequence":"additional","affiliation":[{"name":"Max Planck Institute for Software Systems (MPI-SWS), Saarbr\u00fccken, Germany"}]}],"member":"320","published-online":{"date-parts":[[2022,8,22]]},"reference":[{"key":"e_1_3_2_2_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2015.2438295"},{"key":"e_1_3_2_2_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS48437.2020.00031"},{"key":"e_1_3_2_2_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1851182.1851192"},{"key":"e_1_3_2_2_4_1","volume-title":"Enabling Programmable Transport Protocols in High-Speed NICs. In 17th USENIX Symposium on Networked Systems Design and Implementation","author":"Arashloo Mina Tahmasbi","year":"2020","unstructured":"Mina Tahmasbi Arashloo , Alexey Lavrov , Manya Ghobadi , Jennifer Rexford , David Walker , and David Wentzlaff . 2020 . Enabling Programmable Transport Protocols in High-Speed NICs. In 17th USENIX Symposium on Networked Systems Design and Implementation ( Santa Clara, CA) (NSDI). Mina Tahmasbi Arashloo, Alexey Lavrov, Manya Ghobadi, Jennifer Rexford, David Walker, and David Wentzlaff. 2020. Enabling Programmable Transport Protocols in High-Speed NICs. In 17th USENIX Symposium on Networked Systems Design and Implementation (Santa Clara, CA) (NSDI)."},{"key":"e_1_3_2_2_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629575.1629579"},{"key":"e_1_3_2_2_6_1","volume-title":"12th Workshop on Hot Topics in Operating Systems","author":"Baumann Andrew","year":"2009","unstructured":"Andrew Baumann , Simon Peter , Adrian Sch\u00fcpbach , Akhilesh Singhania , Timothy Roscoe , Paul Barham , and Rebecca Isaacs . 2009 . Your computer is already a distributed system. Why isn't your OS? . In 12th Workshop on Hot Topics in Operating Systems ( Monte Verit\u00e0, Switzerland) (HOTOS). Andrew Baumann, Simon Peter, Adrian Sch\u00fcpbach, Akhilesh Singhania, Timothy Roscoe, Paul Barham, and Rebecca Isaacs. 2009. Your computer is already a distributed system. Why isn't your OS?. In 12th Workshop on Hot Topics in Operating Systems (Monte Verit\u00e0, Switzerland) (HOTOS)."},{"key":"e_1_3_2_2_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/103720.114701"},{"key":"e_1_3_2_2_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"e_1_3_2_2_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/2486001.2486011"},{"key":"e_1_3_2_2_10_1","volume-title":"Simulation of packet communication architecture. Master's thesis","author":"Bryant Randal Everitt","unstructured":"Randal Everitt Bryant . 1977. Simulation of packet communication architecture. Master's thesis . Massachusetts Institute of Technology , Laboratory for Computer Science. Randal Everitt Bryant. 1977. Simulation of packet communication architecture. Master's thesis. Massachusetts Institute of Technology, Laboratory for Computer Science."},{"key":"e_1_3_2_2_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/TSE.1979.230182"},{"key":"e_1_3_2_2_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1577129.1577134"},{"key":"e_1_3_2_2_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/3098822.3098823"},{"key":"e_1_3_2_2_14_1","unstructured":"CXL Consortium. 2020. Compute Express Link (CXL). https:\/\/www.computeexpresslink.org\/spec-landing. Revision 2.0. CXL Consortium. 2020. Compute Express Link (CXL). https:\/\/www.computeexpresslink.org\/spec-landing. Revision 2.0."},{"key":"e_1_3_2_2_15_1","unstructured":"DPDK Project. 2022. Data Plane Development Kit. http:\/\/www.dpdk.org\/. Retrieved Feb 2 2022. DPDK Project. 2022. Data Plane Development Kit. http:\/\/www.dpdk.org\/. Retrieved Feb 2 2022."},{"key":"e_1_3_2_2_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM48280.2020.00015"},{"key":"e_1_3_2_2_17_1","volume-title":"Corundum GitHub Repository. https:\/\/github.com\/corundum\/corundum. Retrieved","author":"Forencich Alex","year":"2022","unstructured":"Alex Forencich , Alex C. Snoeren , George Porter , and George Papen . 2022. Corundum GitHub Repository. https:\/\/github.com\/corundum\/corundum. Retrieved Feb 2, 2022 . Alex Forencich, Alex C. Snoeren, George Porter, and George Papen. 2022. Corundum GitHub Repository. https:\/\/github.com\/corundum\/corundum. Retrieved Feb 2, 2022."},{"key":"e_1_3_2_2_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2014.6844467"},{"key":"e_1_3_2_2_19_1","doi-asserted-by":"publisher","DOI":"10.5555\/301429.301457"},{"key":"e_1_3_2_2_20_1","volume-title":"Re-Architecting Datacenter Networks and Stacks for Low Latency and High Performance. In 2017 ACM SIGCOMM Conference on Data Communication","author":"Handley Mark","year":"2017","unstructured":"Mark Handley , Costin Raiciu , Alexandru Agache , Andrei Voinescu , Andrew W. Moore , Gianni Antichi , and Marcin W\u00f3jcik . 2017 . Re-Architecting Datacenter Networks and Stacks for Low Latency and High Performance. In 2017 ACM SIGCOMM Conference on Data Communication ( Los Angeles, CA) (SIGCOMM). Mark Handley, Costin Raiciu, Alexandru Agache, Andrei Voinescu, Andrew W. Moore, Gianni Antichi, and Marcin W\u00f3jcik. 2017. Re-Architecting Datacenter Networks and Stacks for Low Latency and High Performance. In 2017 ACM SIGCOMM Conference on Data Communication (Los Angeles, CA) (SIGCOMM)."},{"key":"e_1_3_2_2_21_1","volume-title":"https:\/\/inet.omnetpp.org\/. Retrieved","author":"Authors INET","year":"2022","unstructured":"INET Authors . 2022. INET Framework . https:\/\/inet.omnetpp.org\/. Retrieved Feb 2, 2022 . INET Authors. 2022. INET Framework. https:\/\/inet.omnetpp.org\/. Retrieved Feb 2, 2022."},{"key":"e_1_3_2_2_22_1","unstructured":"Intel Corporation. 2020. Intel Ethernet Controller X710\/XXV710\/XL710 Datasheet. https:\/\/cdrdv2.intel.com\/v1\/dl\/getContent\/332464. Revision 3.7. Intel Corporation. 2020. Intel Ethernet Controller X710\/XXV710\/XL710 Datasheet. https:\/\/cdrdv2.intel.com\/v1\/dl\/getContent\/332464. Revision 3.7."},{"key":"e_1_3_2_2_23_1","volume-title":"Intel P4 Studio. https:\/\/www.intel.com\/content\/www\/us\/en\/products\/network-io\/programmable-ethernet-switch\/p4-suite\/p4-studio.html. Retrieved","author":"Intel Corporation","year":"2022","unstructured":"Intel Corporation . 2022. Intel P4 Studio. https:\/\/www.intel.com\/content\/www\/us\/en\/products\/network-io\/programmable-ethernet-switch\/p4-suite\/p4-studio.html. Retrieved Feb 2, 2022 . Intel Corporation. 2022. Intel P4 Studio. https:\/\/www.intel.com\/content\/www\/us\/en\/products\/network-io\/programmable-ethernet-switch\/p4-suite\/p4-studio.html. Retrieved Feb 2, 2022."},{"key":"e_1_3_2_2_24_1","volume-title":"Intel Tofino Series Programmable Switch ASIC. https:\/\/www.intel.com\/content\/www\/us\/en\/products\/network-io\/programmable-ethernet-switch\/tofino-series.html. Retrieved","author":"Intel Corporation","year":"2022","unstructured":"Intel Corporation . 2022. Intel Tofino Series Programmable Switch ASIC. https:\/\/www.intel.com\/content\/www\/us\/en\/products\/network-io\/programmable-ethernet-switch\/tofino-series.html. Retrieved Feb 2, 2022 . Intel Corporation. 2022. Intel Tofino Series Programmable Switch ASIC. https:\/\/www.intel.com\/content\/www\/us\/en\/products\/network-io\/programmable-ethernet-switch\/tofino-series.html. Retrieved Feb 2, 2022."},{"key":"e_1_3_2_2_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080246"},{"key":"e_1_3_2_2_26_1","volume-title":"FireSim: FPGA-accelerated Cycle-exact Scale-out System Simulation in the Public Cloud. In 45th Annual International Symposium on Computer Architecture","author":"Karandikar Sagar","year":"2018","unstructured":"Sagar Karandikar , Howard Mao , Donggyu Kim , David Biancolin , Alon Amid , Dayeol Lee , Nathan Pemberton , Emmanuel Amaro , Colin Schmidt , Aditya Chopra , Qijing Huang , Kyle Kovacs , Borivoje Nikolic , Randy Katz , Jonathan Bachrach , and Krste Asanovi\u0107 . 2018 . FireSim: FPGA-accelerated Cycle-exact Scale-out System Simulation in the Public Cloud. In 45th Annual International Symposium on Computer Architecture ( Los Angeles, CA) (ISCA). Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy Katz, Jonathan Bachrach, and Krste Asanovi\u0107. 2018. FireSim: FPGA-accelerated Cycle-exact Scale-out System Simulation in the Public Cloud. In 45th Annual International Symposium on Computer Architecture (Los Angeles, CA) (ISCA)."},{"key":"e_1_3_2_2_27_1","volume-title":"High Performance Packet Processing with FlexNIC. In 21st International Conference on Architectural Support for Programming Languages and Operating Systems","author":"Kaufmann Antoine","year":"2016","unstructured":"Antoine Kaufmann , Simon Peter , Naveen Kr. Sharma , Thomas Anderson , and Arvind Krishnamurthy . 2016 . High Performance Packet Processing with FlexNIC. In 21st International Conference on Architectural Support for Programming Languages and Operating Systems ( Atlanta, GA) (ASPLOS). Antoine Kaufmann, Simon Peter, Naveen Kr. Sharma, Thomas Anderson, and Arvind Krishnamurthy. 2016. High Performance Packet Processing with FlexNIC. In 21st International Conference on Architectural Support for Programming Languages and Operating Systems (Atlanta, GA) (ASPLOS)."},{"key":"e_1_3_2_2_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/3302424.3303985"},{"key":"e_1_3_2_2_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/3387514.3406591"},{"key":"e_1_3_2_2_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/1868447.1868466"},{"key":"e_1_3_2_2_31_1","volume-title":"Scalable and Extensible Flash Emulator. In 2018 USENIX Annual Technical Conference","author":"Li Huaicheng","unstructured":"Huaicheng Li , Mingzhe Hao , Michael Hao Tong , Swaminathan Sundararaman , Matias Bj\u00f8rling , and Haryadi S. Gunawi . 2018. The CASE of FEMU: Cheap, Accurate , Scalable and Extensible Flash Emulator. In 2018 USENIX Annual Technical Conference ( Boston, MA) (ATC). Huaicheng Li, Mingzhe Hao, Michael Hao Tong, Swaminathan Sundararaman, Matias Bj\u00f8rling, and Haryadi S. Gunawi. 2018. The CASE of FEMU: Cheap, Accurate, Scalable and Extensible Flash Emulator. In 2018 USENIX Annual Technical Conference (Boston, MA) (ATC)."},{"key":"e_1_3_2_2_32_1","doi-asserted-by":"publisher","DOI":"10.1145\/3132747.3132751"},{"key":"e_1_3_2_2_33_1","volume-title":"12th USENIX Symposium on Operating Systems Design and Implementation","author":"Li Jialin","unstructured":"Jialin Li , Ellis Michael , Naveen Kr. Sharma , Adriana Szekeres , and Dan R. K. Ports . 2016. Just Say NO to Paxos Overhead: Replacing Consensus with Network Ordering . In 12th USENIX Symposium on Operating Systems Design and Implementation ( Savannah, GA) (OSDI). Jialin Li, Ellis Michael, Naveen Kr. Sharma, Adriana Szekeres, and Dan R. K. Ports. 2016. Just Say NO to Paxos Overhead: Replacing Consensus with Network Ordering. In 12th USENIX Symposium on Operating Systems Design and Implementation (Savannah, GA) (OSDI)."},{"key":"e_1_3_2_2_34_1","volume-title":"PANIC: A High-Performance Programmable NIC for Multi-tenant Networks. In 14th USENIX Symposium on Operating Systems Design and Implementation (Virtual Event) (OSDI).","author":"Lin Jiaxin","year":"2020","unstructured":"Jiaxin Lin , Kiran Patel , Brent E. Stephens , Anirudh Sivaraman , and Aditya Akella . 2020 . PANIC: A High-Performance Programmable NIC for Multi-tenant Networks. In 14th USENIX Symposium on Operating Systems Design and Implementation (Virtual Event) (OSDI). Jiaxin Lin, Kiran Patel, Brent E. Stephens, Anirudh Sivaraman, and Aditya Akella. 2020. PANIC: A High-Performance Programmable NIC for Multi-tenant Networks. In 14th USENIX Symposium on Operating Systems Design and Implementation (Virtual Event) (OSDI)."},{"key":"e_1_3_2_2_35_1","doi-asserted-by":"publisher","DOI":"10.1145\/3037697.3037731"},{"key":"e_1_3_2_2_36_1","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001156"},{"key":"e_1_3_2_2_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.982916"},{"key":"e_1_3_2_2_38_1","doi-asserted-by":"publisher","DOI":"10.1109\/SAMOS.2017.8344612"},{"key":"e_1_3_2_2_39_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2010.5416635"},{"key":"e_1_3_2_2_40_1","doi-asserted-by":"publisher","DOI":"10.1145\/2785956.2787510"},{"key":"e_1_3_2_2_41_1","volume-title":"Revisiting Network Support for RDMA. In 2018 ACM SIGCOMM Conference on Data Communication","author":"Mittal Radhika","year":"2018","unstructured":"Radhika Mittal , Alexander Shpiner , Aurojit Panda , Eitan Zahavi , Arvind Krishnamurthy , Sylvia Ratnasamy , and Scott Shenker . 2018 . Revisiting Network Support for RDMA. In 2018 ACM SIGCOMM Conference on Data Communication ( Budapest, Hungary) (SIGCOMM). Radhika Mittal, Alexander Shpiner, Aurojit Panda, Eitan Zahavi, Arvind Krishnamurthy, Sylvia Ratnasamy, and Scott Shenker. 2018. Revisiting Network Support for RDMA. In 2018 ACM SIGCOMM Conference on Data Communication (Budapest, Hungary) (SIGCOMM)."},{"key":"e_1_3_2_2_42_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2017.7975287"},{"key":"e_1_3_2_2_43_1","volume-title":"The Network Simulator - ns-2. https:\/\/www.isi.edu\/nsnam\/ns\/. Retrieved","year":"2022","unstructured":"ns-2 Authors. 2022. The Network Simulator - ns-2. https:\/\/www.isi.edu\/nsnam\/ns\/. Retrieved Feb 2, 2022 . ns-2 Authors. 2022. The Network Simulator - ns-2. https:\/\/www.isi.edu\/nsnam\/ns\/. Retrieved Feb 2, 2022."},{"key":"e_1_3_2_2_44_1","volume-title":"ns-3 | a discrete-event network simulator for internet systems. https:\/\/www.nsnam.org\/. Retrieved","year":"2022","unstructured":"nsnam. 2022. ns-3 | a discrete-event network simulator for internet systems. https:\/\/www.nsnam.org\/. Retrieved Feb 2, 2022 . nsnam. 2022. ns-3 | a discrete-event network simulator for internet systems. https:\/\/www.nsnam.org\/. Retrieved Feb 2, 2022."},{"key":"e_1_3_2_2_45_1","doi-asserted-by":"publisher","DOI":"10.5555\/2151054.2151128"},{"key":"e_1_3_2_2_46_1","volume-title":"QEMU - the FAST! processor emulator. https:\/\/www.qemu.org\/. Retrieved","author":"Authors QEMU","year":"2022","unstructured":"QEMU Authors . 2022. QEMU - the FAST! processor emulator. https:\/\/www.qemu.org\/. Retrieved Feb 2, 2022 . QEMU Authors. 2022. QEMU - the FAST! processor emulator. https:\/\/www.qemu.org\/. Retrieved Feb 2, 2022."},{"key":"e_1_3_2_2_47_1","doi-asserted-by":"publisher","DOI":"10.1145\/166955.166979"},{"key":"e_1_3_2_2_48_1","doi-asserted-by":"publisher","DOI":"10.1145\/1964218.1964225"},{"key":"e_1_3_2_2_49_1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485963"},{"key":"e_1_3_2_2_50_1","volume-title":"Evaluating the Power of Flexible Packet Processing for Network Resource Allocation. In 14th USENIX Symposium on Networked Systems Design and Implementation","author":"Sharma Naveen Kr.","year":"2017","unstructured":"Naveen Kr. Sharma , Antoine Kaufmann , Thomas Anderson , Arvind Krishnamurthy , Jacob Nelson , and Simon Peter . 2017 . Evaluating the Power of Flexible Packet Processing for Network Resource Allocation. In 14th USENIX Symposium on Networked Systems Design and Implementation ( Boston, MA) (NSDI). Naveen Kr. Sharma, Antoine Kaufmann, Thomas Anderson, Arvind Krishnamurthy, Jacob Nelson, and Simon Peter. 2017. Evaluating the Power of Flexible Packet Processing for Network Resource Allocation. In 14th USENIX Symposium on Networked Systems Design and Implementation (Boston, MA) (NSDI)."},{"key":"e_1_3_2_2_51_1","volume-title":"Approximating Fair Queueing on Reconfigurable Switches. In 15th USENIX Symposium on Networked Systems Design and Implementation","author":"Sharma Naveen Kr.","year":"2018","unstructured":"Naveen Kr. Sharma , Ming Liu , Kishore Atreya , and Arvind Krishnamurthy . 2018 . Approximating Fair Queueing on Reconfigurable Switches. In 15th USENIX Symposium on Networked Systems Design and Implementation ( Renton, WA) (NSDI). Naveen Kr. Sharma, Ming Liu, Kishore Atreya, and Arvind Krishnamurthy. 2018. Approximating Fair Queueing on Reconfigurable Switches. In 15th USENIX Symposium on Networked Systems Design and Implementation (Renton, WA) (NSDI)."},{"key":"e_1_3_2_2_52_1","volume-title":"ModelSim HDL Simulator. https:\/\/eda.sw.siemens.com\/en-US\/ic\/modelsim\/. Retrieved","year":"2022","unstructured":"Siemens. 2022. ModelSim HDL Simulator. https:\/\/eda.sw.siemens.com\/en-US\/ic\/modelsim\/. Retrieved Feb 2, 2022 . Siemens. 2022. ModelSim HDL Simulator. https:\/\/eda.sw.siemens.com\/en-US\/ic\/modelsim\/. Retrieved Feb 2, 2022."},{"key":"e_1_3_2_2_53_1","doi-asserted-by":"publisher","DOI":"10.1145\/2934872.2934900"},{"key":"e_1_3_2_2_54_1","volume-title":"Verilator - the fastest Verilog HDL simulator. https:\/\/www.veripool.org\/wiki\/verilator. Retrieved","author":"Snyder Wilson","year":"2022","unstructured":"Wilson Snyder . 2022. Verilator - the fastest Verilog HDL simulator. https:\/\/www.veripool.org\/wiki\/verilator. Retrieved Feb 2, 2022 . Wilson Snyder. 2022. Verilator - the fastest Verilog HDL simulator. https:\/\/www.veripool.org\/wiki\/verilator. Retrieved Feb 2, 2022."},{"key":"e_1_3_2_2_55_1","volume-title":"The NeBuLa RPC-Optimized Architecture. In 47th Annual International Symposium on Computer Architecture (Worldwide) (ISCA).","author":"Sutherland Mark","year":"2020","unstructured":"Mark Sutherland , Siddharth Gupta , Babak Falsaf , Virendra Marathe , Dionisios Pnevmatikatos , and Alexandros Daglis . 2020 . The NeBuLa RPC-Optimized Architecture. In 47th Annual International Symposium on Computer Architecture (Worldwide) (ISCA). Mark Sutherland, Siddharth Gupta, Babak Falsaf, Virendra Marathe, Dionisios Pnevmatikatos, and Alexandros Daglis. 2020. The NeBuLa RPC-Optimized Architecture. In 47th Annual International Symposium on Computer Architecture (Worldwide) (ISCA)."},{"key":"e_1_3_2_2_56_1","doi-asserted-by":"publisher","DOI":"10.1145\/2535372.2535374"},{"key":"e_1_3_2_2_57_1","doi-asserted-by":"publisher","DOI":"10.4108\/ICST.SIMUTOOLS2008.3027"},{"key":"e_1_3_2_2_58_1","volume-title":"Isolation mechanisms for packet-processing pipelines. CoRR abs\/2101.12691","author":"Wang Tao","year":"2021","unstructured":"Tao Wang , Xiangrui Yang , Gianni Antichi , Anirudh Sivaraman , and Aurojit Panda . 2021. Isolation mechanisms for packet-processing pipelines. CoRR abs\/2101.12691 ( 2021 ). arXiv:2101.12691 https:\/\/arxiv.org\/abs\/2101.12691 Tao Wang, Xiangrui Yang, Gianni Antichi, Anirudh Sivaraman, and Aurojit Panda. 2021. Isolation mechanisms for packet-processing pipelines. CoRR abs\/2101.12691 (2021). arXiv:2101.12691 https:\/\/arxiv.org\/abs\/2101.12691"},{"key":"e_1_3_2_2_59_1","volume-title":"https:\/\/www.xilinx.com\/support\/documentation-navigation\/design-hubs\/dh0010-vivado-simulation-hub.html. Retrieved","author":"Logic Simulation Vivado","year":"2022","unstructured":"Xilinx. 2022. Vivado 2021.2 Logic Simulation . https:\/\/www.xilinx.com\/support\/documentation-navigation\/design-hubs\/dh0010-vivado-simulation-hub.html. Retrieved Feb 2, 2022 . Xilinx. 2022. Vivado 2021.2 Logic Simulation. https:\/\/www.xilinx.com\/support\/documentation-navigation\/design-hubs\/dh0010-vivado-simulation-hub.html. Retrieved Feb 2, 2022."}],"event":{"name":"SIGCOMM '22: ACM SIGCOMM 2022 Conference","location":"Amsterdam Netherlands","acronym":"SIGCOMM '22","sponsor":["SIGCOMM ACM Special Interest Group on Data Communication"]},"container-title":["Proceedings of the ACM SIGCOMM 2022 Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3544216.3544253","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,8,22]],"date-time":"2023-08-22T10:22:00Z","timestamp":1692699720000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3544216.3544253"}},"subtitle":["end-to-end network system evaluation with modular simulation"],"short-title":[],"issued":{"date-parts":[[2022,8,22]]},"references-count":59,"alternative-id":["10.1145\/3544216.3544253","10.1145\/3544216"],"URL":"https:\/\/doi.org\/10.1145\/3544216.3544253","relation":{},"subject":[],"published":{"date-parts":[[2022,8,22]]},"assertion":[{"value":"2022-08-22","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}