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{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,23]],"date-time":"2025-04-23T01:15:08Z","timestamp":1745370908777,"version":"3.37.3"},"reference-count":39,"publisher":"Association for Computing Machinery (ACM)","issue":"2","license":[{"start":{"date-parts":[[2017,12,7]],"date-time":"2017-12-07T00:00:00Z","timestamp":1512604800000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2018,3,31]]},"abstract":"\n The concept of approximate computing, that is, to sacrifice computation quality for computation efforts, has recently emerged as a promising design approach. Over the past decade, several research works have explored approximate computing at both the software level and hardware level of abstraction with encouraging results. At the hardware level of abstraction, adders (being the fundamental and most widely used data operators in digital systems) have attracted a significant attention for approximation. In this article, we first explain briefly the need\/significance of approximate adders. We then propose four\n Approximate Full Adders<\/jats:italic>\n (AFAs) for high-performance energy-efficient approximate computing. The key design objective behind the proposed AFAs is to curtail the length of carry propagation subjected to minimal error rate. Next, we exploit one of the proposed AFAs (optimal one) to construct an\n N<\/jats:italic>\n -bit approximate adder that hereinafter is referred as \u201cApproxADD.\u201d An emergent property of ApproxADD is that carries do not propagate in it, and, consequently, it provides bit-width-aware constant delay (\n O<\/jats:italic>\n (1)). ApproxADD also provides improvement in dynamic power consumption by 46.31% and in area by 28.57% w.r.t.\n Ripple Carry Adder<\/jats:italic>\n (RCA), which exhibits the lowest power and area. Although ApproxADD provides a significant improvement in delay, power, and area, it may not be preferred for some of the error-resilient applications because its: (i)\n Error Distance<\/jats:italic>\n (ED) is too high; and (ii)\n Error Rate<\/jats:italic>\n (ER) increases rapidly with bit-width (\n N<\/jats:italic>\n ). To improve ED and ER, we exploit the concept of\n carry-lifetime<\/jats:italic>\n and\n Error Detection and Correction<\/jats:italic>\n logic, respectively. In this way, we introduce two more (improved) versions of ApproxADD--ApproxADD\n \u03c5<\/jats:italic>\n 1 and ApproxADD. We call these as ApproxADD\n \u03c5<\/jats:italic>\n 1 and ApproxADD\n \u03c5<\/jats:italic>\n 2 with existing approximate adders based on conventional design metrics and approximate computing design metrics. Furthermore, to inspect effectiveness of the proposed approach in real-life applications, we demonstrate image compression and decompression by replacing the conventional addition operations in\n Discrete Cosine Transform<\/jats:italic>\n (DCT) and\n Inverse Discrete Cosine Transform<\/jats:italic>\n (IDCT) modules with ApproxADD\n \u03c5<\/jats:italic>\n 2.\n <\/jats:p>","DOI":"10.1145\/3131274","type":"journal-article","created":{"date-parts":[[2017,12,11]],"date-time":"2017-12-11T13:26:47Z","timestamp":1512998807000},"page":"1-28","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":25,"title":["Analysis and Design of Adders for Approximate Computing"],"prefix":"10.1145","volume":"17","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-1706-5164","authenticated-orcid":false,"given":"Sunil","family":"Dutt","sequence":"first","affiliation":[{"name":"Indian Institute of Technology Guwahati, Assam, India"}]},{"given":"Sukumar","family":"Nandi","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology Guwahati, Assam, India"}]},{"given":"Gaurav","family":"Trivedi","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology Guwahati, Assam, India"}]}],"member":"320","published-online":{"date-parts":[[2017,12,7]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1982.1675982"},{"key":"e_1_2_1_2_1","article-title":"An analytical framework for evaluating the error characteristics of approximate adders","author":"Han J.","year":"2015","journal-title":"IEEE Trans. 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