乐胖代购免代理版

{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T19:54:02Z","timestamp":1730318042863,"version":"3.28.0"},"publisher-location":"New York, NY, USA","reference-count":32,"publisher":"ACM","license":[{"start":{"date-parts":[[2016,5,16]],"date-time":"2016-05-16T00:00:00Z","timestamp":1463356800000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2016,5,16]]},"DOI":"10.1145\/2903150.2911713","type":"proceedings-article","created":{"date-parts":[[2016,6,2]],"date-time":"2016-06-02T15:23:42Z","timestamp":1464881022000},"page":"384-391","update-policy":"http:\/\/dx.doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":9,"title":["Power and clock gating modelling in coarse grained reconfigurable systems"],"prefix":"10.1145","author":[{"given":"Tiziana","family":"Fanni","sequence":"first","affiliation":[{"name":"University of Cagliari"}]},{"given":"Carlo","family":"Sau","sequence":"additional","affiliation":[{"name":"University of Cagliari"}]},{"given":"Paolo","family":"Meloni","sequence":"additional","affiliation":[{"name":"University of Cagliari"}]},{"given":"Luigi","family":"Raffo","sequence":"additional","affiliation":[{"name":"University of Cagliari"}]},{"given":"Francesca","family":"Palumbo","sequence":"additional","affiliation":[{"name":"University of Sassari PolComIng"}]}],"member":"320","published-online":{"date-parts":[[2016,5,16]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.5555\/1874620.1874752"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2209886"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/ESLsyn.2014.6850387"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-006-7512-7"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2387859"},{"key":"e_1_3_2_1_6_1","article-title":"An algorithm for the machine computation of complex fourier series","volume":"19","author":"Cooley","year":"1965","unstructured":"Cooley et al. An algorithm for the machine computation of complex fourier series . J. Mathematics of Computation , vol. 19 , 1965 . Cooley et al. An algorithm for the machine computation of complex fourier series. J. Mathematics of Computation, vol.19, 1965.","journal-title":"J. Mathematics of Computation"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1064546.1180613"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000108"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/2742854.2747285"},{"key":"e_1_3_2_1_10_1","volume-title":"Process. Syst.","author":"Palumbo","year":"2016","unstructured":"Palumbo et al. Power-awarness in coarse-grained reconfigurable multi-functional architectures: a dataflow based strategy. J. of Sign . Process. Syst. , 2016 . Palumbo et al. Power-awarness in coarse-grained reconfigurable multi-functional architectures: a dataflow based strategy. J. of Sign. Process. Syst., 2016."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.future.2014.12.014"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/370155.370535"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.5555\/367072.367839"},{"key":"e_1_3_2_1_14_1","volume-title":"ARM White Paper","author":"Jeff","year":"2012","unstructured":"Jeff . Advances in big.little technology for power and energy savings . ARM White Paper , 2012 . Jeff. Advances in big.little technology for power and energy savings. ARM White Paper, 2012."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1155\/ASP\/2006\/79595"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/2445572.2445577"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.5555\/2014698.2014866"},{"key":"e_1_3_2_1_18_1","volume-title":"Automation and Test in Europe","author":"Mei","year":"2003","unstructured":"Mei et al. Exploiting loop-level parallelism on coarse-grained reconfigurable architectures using modulo scheduling. Cn. on Design , Automation and Test in Europe , 2003 . Mei et al. Exploiting loop-level parallelism on coarse-grained reconfigurable architectures using modulo scheduling. Cn. on Design, Automation and Test in Europe, 2003."},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2016.01.017"},{"key":"e_1_3_2_1_20_1","volume-title":"Automation and Test in Europe","author":"Oboril","year":"2015","unstructured":"Oboril et al. High-resolution online power monitoring for modern microprocessors. Cn. on Design , Automation and Test in Europe , 2015 . Oboril et al. High-resolution online power monitoring for modern microprocessors. Cn. on Design, Automation and Test in Europe, 2015."},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1007\/s11554-012-0284-3"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/DASIP.2011.6136876"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cdt.2014.0089"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/SiPS.2014.6986104"},{"key":"e_1_3_2_1_25_1","unstructured":"Power Forward Initiative A Practical Guide to Low Power Design 2009. Power Forward Initiative A Practical Guide to Low Power Design 2009."},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/ReCoSoC.2014.6861363"},{"key":"e_1_3_2_1_27_1","volume-title":"Automated Design Flow for Coarse-Grained Reconfigurable Platforms: an RVC-CAL Multi-Standard Decoder Use-Case. Cn. on Embedded Computer Systems: Architectures, Modeling, and Simulation","author":"Sau","year":"2014","unstructured":"Sau et al. Automated Design Flow for Coarse-Grained Reconfigurable Platforms: an RVC-CAL Multi-Standard Decoder Use-Case. Cn. on Embedded Computer Systems: Architectures, Modeling, and Simulation , 2014 . Sau et al. Automated Design Flow for Coarse-Grained Reconfigurable Platforms: an RVC-CAL Multi-Standard Decoder Use-Case. Cn. on Embedded Computer Systems: Architectures, Modeling, and Simulation, 2014."},{"key":"e_1_3_2_1_28_1","unstructured":"Synopsys Website. Advanced low power techniques. At http:\/\/goo.gl\/2FqEjf. Synopsys Website. Advanced low power techniques. At http:\/\/goo.gl\/2FqEjf."},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/DFM.2014.10"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1587\/elex.12.20150817"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2006.32"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1145\/2751561"}],"event":{"name":"CF'16: Computing Frontiers Conference","sponsor":["Micron Foundation Micron Technology Foundation, Inc.","ACM Association for Computing Machinery","Politecnico di Milano Politecnico di Milano","SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing","IBM IBM"],"location":"Como Italy","acronym":"CF'16"},"container-title":["Proceedings of the ACM International Conference on Computing Frontiers"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2903150.2911713","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,1,7]],"date-time":"2023-01-07T00:41:38Z","timestamp":1673052098000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2903150.2911713"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,5,16]]},"references-count":32,"alternative-id":["10.1145\/2903150.2911713","10.1145\/2903150"],"URL":"https:\/\/doi.org\/10.1145\/2903150.2911713","relation":{},"subject":[],"published":{"date-parts":[[2016,5,16]]},"assertion":[{"value":"2016-05-16","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}