{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T13:10:56Z","timestamp":1740143456547,"version":"3.37.3"},"reference-count":40,"publisher":"Association for Computing Machinery (ACM)","issue":"1","license":[{"start":{"date-parts":[[2016,1,13]],"date-time":"2016-01-13T00:00:00Z","timestamp":1452643200000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2016,2,20]]},"abstract":"Present-day focus on multicore research has not only increased computing power but also power- and bandwidth-efficient communication among cores. On-chip communication networks have become popular today because of their low energy use and modular structure compared to bus-based interconnects. Silicon photonics has further boosted the performance of on-chip interconnection networks with its low energy-delay product and high reliability. In current multicore Network-on-Chip (NoC) architectures, photonics is playing an important role in transferring large volumes of data both on- and off-chip. The problem addressed in this work is the issue of broadcast traffic arising due to invalidation requests from on-chip cache memories. Although such traffic is typically less than 1% of total traffic, it can easily present a high load on network resources, creating congestion and degrading performance. In this article, we propose a CDMA-based, secure, scalable, and energy-efficient technique to eliminate broadcast invalidations and increase overall performance. Experimental results indicate a performance boost up to 22.2% over a competing Photonic NoC and up to 57.4% over Electrical Mesh-based NoC when the proposed technique is used. Additional hardware deployed has an area overhead of less than 1%, whereas total energy consumed is at par with other state-of-the-art techniques.<\/jats:p>","DOI":"10.1145\/2839301","type":"journal-article","created":{"date-parts":[[2016,1,16]],"date-time":"2016-01-16T16:34:35Z","timestamp":1452962075000},"page":"1-30","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Design of a High-Performance CDMA-Based Broadcast-Free Photonic Multi-Core Network on Chip"],"prefix":"10.1145","volume":"15","author":[{"given":"Soumyajit","family":"Poddar","sequence":"first","affiliation":[{"name":"Indian Institute of Engineering Science and Technology, Shibpur, India"}]},{"given":"Prasun","family":"Ghosal","sequence":"additional","affiliation":[{"name":"Indian Institute of Engineering Science and Technology, Shibpur, India"}]},{"given":"Hafizur","family":"Rahaman","sequence":"additional","affiliation":[{"name":"Indian Institute of Engineering Science and Technology, Shibpur, India"}]}],"member":"320","published-online":{"date-parts":[[2016,1,13]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1999946.1999961"},{"key":"e_1_2_1_2_1","volume-title":"Proceedings of the 13th International Symposium on Quality Electronic Design, 2012","author":"Bahirat S.","year":"2012","unstructured":"S. Bahirat and S. Pasricha . 2012. A particle swarm optimization approach for synthesizing application-specific hybrid photonic networks-on-chip . In Proceedings of the 13th International Symposium on Quality Electronic Design, 2012 (ISQED'12). 78--83. DOI:http:\/\/dx.doi.org\/10.1109\/ISQED. 2012 .6187477 10.1109\/ISQED.2012.6187477 S. Bahirat and S. Pasricha. 2012. A particle swarm optimization approach for synthesizing application-specific hybrid photonic networks-on-chip. In Proceedings of the 13th International Symposium on Quality Electronic Design, 2012 (ISQED'12). 78--83. DOI:http:\/\/dx.doi.org\/10.1109\/ISQED.2012.6187477"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/IDT.2008.4802497"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/OIC.2012.6224449"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379048"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/1999946.1999958"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/2602155"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2009.5071460"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/2567930"},{"key":"e_1_2_1_11_1","volume-title":"Proceedings of the IEEE Computer Society Annual Symposium on VLSI 2002","author":"Kumar S.","year":"2002","unstructured":"S. Kumar , A. Jantsch , J.-P. Soininen , M. Forsell , M. Millberg , J. Oberg , K. Tiensyrja , and A. Hemani . 2002. A network on chip architecture and design methodology . In Proceedings of the IEEE Computer Society Annual Symposium on VLSI 2002 . 105--112. DOI:http:\/\/dx.doi.org\/10.1109\/ ISVLSI. 2002 .1016885 S. Kumar, A. Jantsch, J.-P. Soininen, M. Forsell, M. Millberg, J. Oberg, K. Tiensyrja, and A. Hemani. 2002. A network on chip architecture and design methodology. In Proceedings of the IEEE Computer Society Annual Symposium on VLSI 2002. 105--112. DOI:http:\/\/dx.doi.org\/10.1109\/ ISVLSI.2002.1016885"},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1854273.1854332"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1007\/s10617-011-9075-5"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2320510"},{"key":"e_1_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/OIC.2012.6224445"},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669172"},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/1064978.1065034"},{"key":"e_1_2_1_18_1","volume-title":"Proceedings of the 1999 IEEE International Symposium on Circuits and Systems 1999 (ISCAS'99)","volume":"2","author":"Meincke T.","year":"1999","unstructured":"T. Meincke , A. Hemani , S. Kumar , P. Ellervee , J. Oberg , T. Olsson , P. Nilsson , D. Lindqvist , and H. Tenhunen . 1999. Globally asynchronous locally synchronous architecture for large high-performance ASICs . In Proceedings of the 1999 IEEE International Symposium on Circuits and Systems 1999 (ISCAS'99) , Vol. 2 . 512--515. DOI:http:\/\/dx.doi.org\/10.1109\/ISCAS. 1999 .780794 10.1109\/ISCAS.1999.780794 T. Meincke, A. Hemani, S. Kumar, P. Ellervee, J. Oberg, T. Olsson, P. Nilsson, D. Lindqvist, and H. Tenhunen. 1999. Globally asynchronous locally synchronous architecture for large high-performance ASICs. In Proceedings of the 1999 IEEE International Symposium on Circuits and Systems 1999 (ISCAS'99), Vol. 2. 512--515. DOI:http:\/\/dx.doi.org\/10.1109\/ISCAS.1999.780794"},{"key":"e_1_2_1_19_1","volume-title":"Proceedings of the IEEE 16th International Symposium on High Performance Computer Architecture (HPCA'10)","author":"Miller J. E.","year":"2010","unstructured":"J. E. Miller , H. Kasture , G. Kurian , C. Gruenwald , N. Beckmann , C. Celio , J. Eastep , and A. Agarwal . 2010. Graphite: A distributed parallel simulator for multicores . In Proceedings of the IEEE 16th International Symposium on High Performance Computer Architecture (HPCA'10) . 1--12. DOI:http:\/\/dx.doi.org\/10.1109\/ HPCA. 2010 .5416635 J. E. Miller, H. Kasture, G. Kurian, C. Gruenwald, N. Beckmann, C. Celio, J. Eastep, and A. Agarwal. 2010. Graphite: A distributed parallel simulator for multicores. In Proceedings of the IEEE 16th International Symposium on High Performance Computer Architecture (HPCA'10). 1--12. DOI:http:\/\/dx.doi.org\/10.1109\/ HPCA.2010.5416635"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/2039370.2039406"},{"key":"#cr-split#-e_1_2_1_22_1.1","doi-asserted-by":"crossref","unstructured":"Ian O' Connor and Gabriela Nicolescu (Eds.). 2013. Integrated Optical Interconnect Architectures for Embedded Systems. Springer New York. DOI:http:\/\/dx.doi.org\/10.1007\/978-1-4419-6193-8 10.1007\/978-1-4419-6193-8","DOI":"10.1007\/978-1-4419-6193-8"},{"key":"#cr-split#-e_1_2_1_22_1.2","doi-asserted-by":"crossref","unstructured":"Ian O' Connor and Gabriela Nicolescu (Eds.). 2013. Integrated Optical Interconnect Architectures for Embedded Systems. Springer New York. DOI:http:\/\/dx.doi.org\/10.1007\/978-1-4419-6193-8","DOI":"10.1007\/978-1-4419-6193-8"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1007\/11863854_4"},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/LPT.2010.2041445"},{"key":"e_1_2_1_25_1","volume-title":"Proceedings of the IEEE 16th International Symposium on High Performance Computer Architecture (HPCA 2010","author":"Pan Yan","year":"2010","unstructured":"Yan Pan , J. Kim , and G. Memik . 2010. FlexiShare: Channel sharing for an energy-efficient nanophotonic crossbar . In Proceedings of the IEEE 16th International Symposium on High Performance Computer Architecture (HPCA 2010 ). 1--12. DOI:http:\/\/dx.doi.org\/10.1109\/ HPCA. 2010 .5416626 Yan Pan, J. Kim, and G. Memik. 2010. FlexiShare: Channel sharing for an energy-efficient nanophotonic crossbar. In Proceedings of the IEEE 16th International Symposium on High Performance Computer Architecture (HPCA 2010). 1--12. DOI:http:\/\/dx.doi.org\/10.1109\/ HPCA.2010.5416626"},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555808"},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.5555\/1950815.1950890"},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2012.6398331"},{"key":"e_1_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-31494-0_50"},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISED.2013.29"},{"key":"e_1_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.5555\/1481679"},{"key":"e_1_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.78"},{"key":"e_1_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1109\/HOTI.2007.25"},{"key":"e_1_2_1_34_1","volume-title":"Wood","author":"Sorin Daniel J.","year":"2011","unstructured":"Daniel J. Sorin , Mark D. Hill , and David A . Wood . 2011 . A Primer on Memory Consistency and Cache Coherence. Vol. 6 . Morgan and Claypool . 1--212 pages. DOI:http:\/\/dx.doi.org\/10.2200\/S00346ED1V01Y201104CAC016 10.2200\/S00346ED1V01Y201104CAC016 Daniel J. Sorin, Mark D. Hill, and David A. Wood. 2011. A Primer on Memory Consistency and Cache Coherence. Vol. 6. Morgan and Claypool. 1--212 pages. DOI:http:\/\/dx.doi.org\/10.2200\/S00346ED1V01Y201104CAC016"},{"key":"e_1_2_1_35_1","volume-title":"Proceedings of the 2nd ACM\/IEEE International Symposium on Networks-on-Chip 2008 (NoCS'08)","author":"Stensgaard M. B.","year":"2008","unstructured":"M. B. Stensgaard and J. Sparso . 2008. ReNoC: A network-on-chip architecture with reconfigurable topology . In Proceedings of the 2nd ACM\/IEEE International Symposium on Networks-on-Chip 2008 (NoCS'08) . 55--64. DOI:http:\/\/dx.doi.org\/10.1109\/ NOCS. 2008 .4492725 M. B. Stensgaard and J. Sparso. 2008. ReNoC: A network-on-chip architecture with reconfigurable topology. In Proceedings of the 2nd ACM\/IEEE International Symposium on Networks-on-Chip 2008 (NoCS'08). 55--64. DOI:http:\/\/dx.doi.org\/10.1109\/ NOCS.2008.4492725"},{"key":"e_1_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2012.31"},{"key":"e_1_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.903914"},{"key":"e_1_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1145\/223982.223990"},{"key":"e_1_2_1_39_1","volume-title":"Proceedings of the 19th Annual Meeting of the IEEE Lasers and Electro-Optics Society 2006 (LEOS'06)","author":"Xu Qianfan","year":"2006","unstructured":"Qianfan Xu , B. Schmid , J. Shakya , and M. Lipson . 2006. WDM silicon modulators based on micro-ring resonators . In Proceedings of the 19th Annual Meeting of the IEEE Lasers and Electro-Optics Society 2006 (LEOS'06) . 647--648. DOI:http:\/\/dx.doi.org\/10.1109\/ LEOS. 2006 .278862 Qianfan Xu, B. Schmid, J. Shakya, and M. Lipson. 2006. WDM silicon modulators based on micro-ring resonators. In Proceedings of the 19th Annual Meeting of the IEEE Lasers and Electro-Optics Society 2006 (LEOS'06). 647--648. DOI:http:\/\/dx.doi.org\/10.1109\/ LEOS.2006.278862"},{"key":"e_1_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1145\/2093145.2093150"},{"key":"e_1_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1109\/GROUP4.2012.6324160"}],"container-title":["ACM Transactions on Embedded Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2839301","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,12,31]],"date-time":"2022-12-31T10:13:29Z","timestamp":1672481609000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2839301"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,1,13]]},"references-count":40,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2016,2,20]]}},"alternative-id":["10.1145\/2839301"],"URL":"https:\/\/doi.org\/10.1145\/2839301","relation":{},"ISSN":["1539-9087","1558-3465"],"issn-type":[{"type":"print","value":"1539-9087"},{"type":"electronic","value":"1558-3465"}],"subject":[],"published":{"date-parts":[[2016,1,13]]},"assertion":[{"value":"2015-01-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2015-10-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2016-01-13","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}