{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,12,31]],"date-time":"2022-12-31T05:22:35Z","timestamp":1672464155978},"reference-count":31,"publisher":"Association for Computing Machinery (ACM)","issue":"3","license":[{"start":{"date-parts":[[2014,9,3]],"date-time":"2014-09-03T00:00:00Z","timestamp":1409702400000},"content-version":"vor","delay-in-days":33,"URL":"http:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100004263","name":"Funda\u00e7\u00e3o de Amparo \u00e0 Pesquisa do Estado do Rio Grande do Sul","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100004263","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003593","name":"Conselho Nacional de Desenvolvimento Cient\u00edfico e Tecnol\u00f3gico","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003593","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100002322","name":"Coordena\u00e7\u00e3o de Aperfei\u00e7oamento de Pessoal de N\u00edvel Superior","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100002322","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Reconfigurable Technol. Syst."],"published-print":{"date-parts":[[2014,8]]},"abstract":"\n This article introduces the resilient adaptive algebraic architecture that aims at adapting parallelism exploitation of a matrix multiplication algorithm in a time-deterministic fashion to reduce power consumption while meeting real-time deadlines present in most DSP-like applications. The proposed architecture provides low-overhead error correction capabilities relying on the hardware implementation of the algorithm-based fault-tolerance method that is executed concurrently with matrix multiplication, providing efficient occupation of memory and power resources. The Resilient Adaptive Algebraic Architecture (RA\n 3<\/jats:sup>\n ) is evaluated using three real-time industrial case studies from the telecom and multimedia application domains to present the design space exploration and the adaptation possibilities the architecture offers to hardware designers. RA\n 3<\/jats:sup>\n is compared in its performance and energy efficiency with standard high-performance architectures, namely a GPU and an out-of-order general-purpose processor. Finally, we present the results of fault injection campaigns in order to measure the architecture resilience to soft errors.\n <\/jats:p>","DOI":"10.1145\/2556943","type":"journal-article","created":{"date-parts":[[2014,8,29]],"date-time":"2014-08-29T13:03:31Z","timestamp":1409317411000},"page":"1-17","update-policy":"http:\/\/dx.doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["Adaptive Parallelism Exploitation under Physical and Real-Time Constraints for Resilient Systems"],"prefix":"10.1145","volume":"7","author":[{"given":"F\u00e1bio","family":"Itturiet","sequence":"first","affiliation":[{"name":"Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil"}]},{"given":"Gabriel","family":"Nazar","sequence":"additional","affiliation":[{"name":"Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil"}]},{"given":"Ronaldo","family":"Ferreira","sequence":"additional","affiliation":[{"name":"Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil"}]},{"given":"\u00c1lvaro","family":"Moreira","sequence":"additional","affiliation":[{"name":"Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil"}]},{"given":"Luigi","family":"Carro","sequence":"additional","affiliation":[{"name":"Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil"}]}],"member":"320","published-online":{"date-parts":[[2014,9,3]]},"reference":[{"key":"e_1_2_1_1_1","volume-title":"Proceedings of the IEEE International Conference on Computer Design (ICCD'10)","author":"Ahmadian A."},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.69"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/TASL.2011.2144972"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPA.2011.50"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000108"},{"key":"e_1_2_1_6_1","volume-title":"Proceedings of the 5th International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS'10)","author":"Firouzi F."},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1049\/el:20030331"},{"key":"e_1_2_1_8_1","unstructured":"G. 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