{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T11:01:33Z","timestamp":1725620493736},"publisher-location":"New York, NY, USA","reference-count":36,"publisher":"ACM","content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2013,9,19]]},"DOI":"10.1145\/2491845.2491865","type":"proceedings-article","created":{"date-parts":[[2013,9,3]],"date-time":"2013-09-03T11:57:17Z","timestamp":1378209437000},"page":"195-202","update-policy":"http:\/\/dx.doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Hardware design space exploration using HercuLeS HLS"],"prefix":"10.1145","author":[{"given":"Nikolaos","family":"Kavvadias","sequence":"first","affiliation":[{"name":"Ajax Compilers, Athens, Greece"}]},{"given":"Kostas","family":"Masselos","sequence":"additional","affiliation":[{"name":"University of Peloponnese, Tripoli, Greece"}]}],"member":"320","published-online":{"date-parts":[[2013,9,19]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"C-to-Silicon. http:\/\/www.cadence.com\/products\/sd\/-silicon_compiler\/pages\/default.aspx. C-to-Silicon. http:\/\/www.cadence.com\/products\/sd\/-silicon_compiler\/pages\/default.aspx."},{"key":"e_1_3_2_1_2_1","unstructured":"C-to-Verilog. http:\/\/www.c-to-verilog.com. C-to-Verilog. http:\/\/www.c-to-verilog.com."},{"key":"e_1_3_2_1_3_1","unstructured":"C2H. http:\/\/www.altera.com\/products\/ip\/-processors\/nios2\/tools\/c2h\/ni2-c2h.html. C2H. http:\/\/www.altera.com\/products\/ip\/-processors\/nios2\/tools\/c2h\/ni2-c2h.html."},{"key":"e_1_3_2_1_4_1","unstructured":"CatapultC. http:\/\/calypto.com\/en\/products\/catapult\/overview\/. CatapultC. http:\/\/calypto.com\/en\/products\/catapult\/overview\/."},{"key":"e_1_3_2_1_5_1","unstructured":"FloPoCo. http:\/\/flopoco.gforge.inria.fr\/. FloPoCo. http:\/\/flopoco.gforge.inria.fr\/."},{"key":"e_1_3_2_1_6_1","unstructured":"GAUT. http:\/\/www-labsticc.univ-ubs.fr\/www-gaut\/. GAUT. http:\/\/www-labsticc.univ-ubs.fr\/www-gaut\/."},{"key":"e_1_3_2_1_7_1","unstructured":"GHDL. http:\/\/ghdl.free.fr. GHDL. http:\/\/ghdl.free.fr."},{"key":"e_1_3_2_1_8_1","unstructured":"GIMPLE. http:\/\/gcc.gnu.org\/wiki\/GIMPLE. GIMPLE. http:\/\/gcc.gnu.org\/wiki\/GIMPLE."},{"key":"e_1_3_2_1_9_1","unstructured":"Graphviz. http:\/\/www.graphviz.org. Graphviz. http:\/\/www.graphviz.org."},{"key":"e_1_3_2_1_10_1","unstructured":"GTKwave. http:\/\/sourceforge.net\/projects\/gtkwave. GTKwave. http:\/\/sourceforge.net\/projects\/gtkwave."},{"key":"e_1_3_2_1_11_1","unstructured":"ImpulseC. http:\/\/www.acceleratedtechnologies.com. ImpulseC. http:\/\/www.acceleratedtechnologies.com."},{"key":"e_1_3_2_1_12_1","unstructured":"ITRS. http:\/\/www.itrs.net\/reports.html. ITRS. http:\/\/www.itrs.net\/reports.html."},{"key":"e_1_3_2_1_13_1","unstructured":"LegUp. http:\/\/www.legup.org. LegUp. http:\/\/www.legup.org."},{"key":"e_1_3_2_1_14_1","unstructured":"LLVM. LLVM."},{"key":"e_1_3_2_1_15_1","unstructured":"Modelsim. http:\/\/www.model.com. Modelsim. http:\/\/www.model.com."},{"key":"e_1_3_2_1_16_1","unstructured":"ROCCC. http:\/\/www.jacquardcomputing.com\/roccc\/. ROCCC. http:\/\/www.jacquardcomputing.com\/roccc\/."},{"key":"e_1_3_2_1_17_1","unstructured":"SPARK. http:\/\/mesl.ucsd.edu\/spark\/. SPARK. http:\/\/mesl.ucsd.edu\/spark\/."},{"key":"e_1_3_2_1_18_1","unstructured":"Synphony HLS. http:\/\/www.synopsys.com\/Tools\/-SLD\/HLS\/Pages\/default.aspx. Synphony HLS. http:\/\/www.synopsys.com\/Tools\/-SLD\/HLS\/Pages\/default.aspx."},{"key":"e_1_3_2_1_19_1","unstructured":"The GNU Compiler Collection homepage. http:\/\/gcc.gnu.org. The GNU Compiler Collection homepage. http:\/\/gcc.gnu.org."},{"key":"e_1_3_2_1_20_1","unstructured":"TransC. http:\/\/cgi.tu-harburg.de\/~ti6hm\/. TransC. http:\/\/cgi.tu-harburg.de\/~ti6hm\/."},{"key":"e_1_3_2_1_21_1","unstructured":"Txl programming language homepage. http:\/\/www.txl.ca. Txl programming language homepage. http:\/\/www.txl.ca."},{"key":"e_1_3_2_1_22_1","unstructured":"Xilinx. http:\/\/www.xilinx.com. Xilinx. http:\/\/www.xilinx.com."},{"key":"e_1_3_2_1_23_1","unstructured":"IEEE 1364-2005 Standard for Verilog Hardware Description Language Apr. 2006. IEEE 1364-2005 Standard for Verilog Hardware Description Language Apr. 2006."},{"key":"e_1_3_2_1_24_1","unstructured":"IEEE 1076-2008 Standard VHDL Language Reference Manual Jan. 2009. IEEE 1076-2008 Standard VHDL Language Reference Manual Jan. 2009."},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/278283.278285"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.5555\/647476.727759"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.5555\/1204106"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.5555\/1457713"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/54.329454"},{"key":"e_1_3_2_1_30_1","unstructured":"M. Henderson. fgmp: Free\/public-domain MP library. http:\/\/ftp.ee.netbsd.org\/pub\/pkgsrc\/packages\/-NetBSD\/sparc\/5.1\/math\/. M. Henderson. fgmp: Free\/public-domain MP library. http:\/\/ftp.ee.netbsd.org\/pub\/pkgsrc\/packages\/-NetBSD\/sparc\/5.1\/math\/."},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.4218\/etrij.11.0110.0654"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.5772\/36932"},{"key":"e_1_3_2_1_33_1","first-page":"351","volume-title":"Proc. Int. Conf. on Engin. of Reconf. Sys. and Applications (ERSA'11)","author":"Kavvadias N.","year":"2011","unstructured":"N. Kavvadias and K. Masselos . NAC: A lightweight intermediate representation for ASIP compilers . In Proc. Int. Conf. on Engin. of Reconf. Sys. and Applications (ERSA'11) , pages 351 -- 354 , Las Vegas, Nevada, USA , Jul. 2011 . N. Kavvadias and K. Masselos. NAC: A lightweight intermediate representation for ASIP compilers. In Proc. Int. Conf. on Engin. of Reconf. Sys. and Applications (ERSA'11), pages 351--354, Las Vegas, Nevada, USA, Jul. 2011."},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2012.29"},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2004.03.008"},{"key":"e_1_3_2_1_36_1","unstructured":"Xilinx. Vivado ESL Design. http:\/\/www.xilinx.com\/products\/design-tools\/vivado\/integration\/esl-design\/index.htm. Xilinx. Vivado ESL Design. http:\/\/www.xilinx.com\/products\/design-tools\/vivado\/integration\/esl-design\/index.htm."}],"event":{"name":"PCI 2013: 17th Panhellenic Conference on Informatics","sponsor":["University of Macedonia","Aristotle University of Thessaloniki","The University of Sheffield The University of Sheffield","Alexander TEI of Thessaloniki"],"location":"Thessaloniki Greece","acronym":"PCI 2013"},"container-title":["Proceedings of the 17th Panhellenic Conference on Informatics"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2491845.2491865","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,1,13]],"date-time":"2023-01-13T01:26:00Z","timestamp":1673573160000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2491845.2491865"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,9,19]]},"references-count":36,"alternative-id":["10.1145\/2491845.2491865","10.1145\/2491845"],"URL":"https:\/\/doi.org\/10.1145\/2491845.2491865","relation":{},"subject":[],"published":{"date-parts":[[2013,9,19]]},"assertion":[{"value":"2013-09-19","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}