{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T09:53:13Z","timestamp":1725616393027},"publisher-location":"New York, NY, USA","reference-count":3,"publisher":"ACM","content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2010,9,11]]},"DOI":"10.1145\/1854273.1854349","type":"proceedings-article","created":{"date-parts":[[2010,9,14]],"date-time":"2010-09-14T14:53:20Z","timestamp":1284476000000},"page":"555-556","update-policy":"http:\/\/dx.doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Exploiting subtrace-level parallelism in clustered processors"],"prefix":"10.1145","author":[{"given":"Rafael","family":"Ubal","sequence":"first","affiliation":[{"name":"Universidad Polit\u00e9cnica de Valencia, Valencia, Spain"}]},{"given":"Julio","family":"Sahuquillo","sequence":"additional","affiliation":[{"name":"Universidad Polit\u00e9cnica de Valencia, Valencia, Spain"}]},{"given":"Salvador","family":"Petit","sequence":"additional","affiliation":[{"name":"Universidad Polit\u00e9cnica de Valencia, Valencia, Spain"}]},{"given":"Pedro","family":"L\u00f3pez","sequence":"additional","affiliation":[{"name":"Universidad Polit\u00e9cnica de Valencia, Valencia, Spain"}]},{"given":"Jose","family":"Duato","sequence":"additional","affiliation":[{"name":"Universidad Polit\u00e9cnica de Valencia, Valencia, Spain"}]}],"member":"320","published-online":{"date-parts":[[2010,9,11]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.5555\/520793.825753"},{"key":"e_1_3_2_1_2_1","volume-title":"SBAC-PAD'07, www.multi2sim.org","author":"Ubal R.","year":"2007","unstructured":"}} R. Ubal , J. Sahuquillo , S. Petit , and P. L\u00f3pez . Multi2Sim: A Simulation Framework to Evaluate Multicore-Multithreaded Processors . In SBAC-PAD'07, www.multi2sim.org , Oct. 2007 . }}R. Ubal, J. Sahuquillo, S. Petit, and P. L\u00f3pez. Multi2Sim: A Simulation Framework to Evaluate Multicore-Multithreaded Processors. In SBAC-PAD'07, www.multi2sim.org, Oct. 2007."},{"key":"e_1_3_2_1_3_1","volume-title":"Efficient Interconnects for Clustered Microarchitectures. In PACT'02","author":"Parcerisa J. M.","year":"2002","unstructured":"}} J. M. Parcerisa , J. Sahuquillo , A. Gonz\u00e1lez , and J. Duato . Efficient Interconnects for Clustered Microarchitectures. In PACT'02 , Sept. 2002 . }}J. M. Parcerisa, J. Sahuquillo, A. Gonz\u00e1lez, and J. Duato. Efficient Interconnects for Clustered Microarchitectures. In PACT'02, Sept. 2002."}],"event":{"name":"PACT '10: International Conference on Parallel Architectures and Compilation Techniques","sponsor":["IFIP WG 10.3 IFIP working group 10.3 on concurrent systems","IEEE CS TCPP IEEE-CS technical committee on parallel processing","SIGARCH ACM Special Interest Group on Computer Architecture","IEEE CS TCAA IEEE CS technical committee on architectural acoustics"],"location":"Vienna Austria","acronym":"PACT '10"},"container-title":["Proceedings of the 19th international conference on Parallel architectures and compilation techniques"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1854273.1854349","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,1,9]],"date-time":"2023-01-09T22:16:47Z","timestamp":1673302607000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1854273.1854349"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,9,11]]},"references-count":3,"alternative-id":["10.1145\/1854273.1854349","10.1145\/1854273"],"URL":"https:\/\/doi.org\/10.1145\/1854273.1854349","relation":{},"subject":[],"published":{"date-parts":[[2010,9,11]]},"assertion":[{"value":"2010-09-11","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}