乐胖代购免代理版

{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T01:27:17Z","timestamp":1725672437074},"publisher-location":"New York, NY, USA","reference-count":22,"publisher":"ACM","content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2008,2,20]]},"DOI":"10.1145\/1345206.1345218","type":"proceedings-article","created":{"date-parts":[[2008,2,28]],"date-time":"2008-02-28T09:02:49Z","timestamp":1204189369000},"page":"63-72","update-policy":"http:\/\/dx.doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":7,"title":["High performance dense linear algebra on a spatially distributed processor"],"prefix":"10.1145","author":[{"given":"Jeffrey R.","family":"Diamond","sequence":"first","affiliation":[{"name":"The University of Texas at Austin, Austin, TX, USA"}]},{"given":"Behnam","family":"Robatmili","sequence":"additional","affiliation":[{"name":"The University of Texas at Austin, Austin, TX, USA"}]},{"given":"Stephen W.","family":"Keckler","sequence":"additional","affiliation":[{"name":"The University of Texas at Austin, Austin, TX, USA"}]},{"given":"Robert","family":"van de Geijn","sequence":"additional","affiliation":[{"name":"The University of Texas at Austin, Austin, TX, USA"}]},{"given":"Kazushige","family":"Goto","sequence":"additional","affiliation":[{"name":"The University of Texas at Austin, Austin, TX, USA"}]},{"given":"Doug","family":"Burger","sequence":"additional","affiliation":[{"name":"The University of Texas at Austin, Austin, TX, USA"}]}],"member":"320","published-online":{"date-parts":[[2008,2,20]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1356052.1356053"},{"key":"e_1_3_2_1_2_1","volume-title":"J. Demmel, J. Dongarra, J. Du Croz, A. Greenbaum, S. Hammarling, A. McKenney, S. Ostrouchov, D.","author":"Anderson E.","year":"1995","unstructured":"E. Anderson and Z. Bai , C. Bischof , J. Demmel, J. Dongarra, J. Du Croz, A. Greenbaum, S. Hammarling, A. McKenney, S. Ostrouchov, D. Sorensen , LAPACK's user's guide, Society for Industrial and Applied Mathematics , 1995 . E. Anderson and Z. Bai, C. Bischof, J. Demmel, J. Dongarra, J. Du Croz, A. Greenbaum, S. Hammarling, A. McKenney, S. Ostrouchov, D. Sorensen, LAPACK's user's guide, Society for Industrial and Applied Mathematics, 1995."},{"key":"e_1_3_2_1_3_1","volume-title":"FLAME Working Note #9","author":"Goto K.","year":"2002","unstructured":"K. Goto and R. van de Geijn , On Reducing TLB Misses in Matrix Multiplication , FLAME Working Note #9 , The University of Texas at Austin, Department of Computer Sciences . Technical Report TR-2002-55, November 2002 . K. Goto and R. van de Geijn, On Reducing TLB Misses in Matrix Multiplication, FLAME Working Note #9, The University of Texas at Austin, Department of Computer Sciences. Technical Report TR-2002-55, November 2002."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.5555\/956417.956546"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.612254"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2004.65"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.19"},{"key":"e_1_3_2_1_8_1","volume-title":"IEEE International Solid-State Circuits Conference","author":"Vangal S.","year":"2007","unstructured":"S. Vangal , J. Howard , G. Ruhl , S. Dighe , H. Wilson , J. Tschanz , D. Finan , P. Iyer , A. Singh , T. Jacob , S. Jain , S. Venkataraman , Y. Hoskote and N. Borkar , An 80-Tile 1.28 TFLOPS Network-on-Chip in 65nm CMOS , IEEE International Solid-State Circuits Conference , February 2007 . S. Vangal, J. Howard, G. Ruhl, S. Dighe, H. Wilson, J. Tschanz, D. Finan, P. Iyer, A. Singh, T. Jacob, S. Jain, S. Venkataraman, Y. Hoskote and N. Borkar, An 80-Tile 1.28 TFLOPS Network-on-Chip in 65nm CMOS, IEEE International Solid-State Circuits Conference, February 2007."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1028176.1006733"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2002.997877"},{"key":"e_1_3_2_1_11_1","volume-title":"Introduction to VLSI Systems","author":"Kung H. T.","year":"1979","unstructured":"H. T. Kung and C. E. Leiserson , Algorithms for VLSI processor arrays , Introduction to VLSI Systems ; Addison-Wesley , 1979 . H. T. Kung and C. E. Leiserson, Algorithms for VLSI processor arrays, Introduction to VLSI Systems; Addison-Wesley, 1979."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1016\/0167-8191(88)90095-6"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.5555\/645455.653765"},{"key":"e_1_3_2_1_14_1","volume-title":"Euroropean Conference on Parallel Processing, 13: 748--757","author":"Marker B.","year":"2007","unstructured":"B. Marker , F. Van Zee , K. Goto , G. Quintana-Orti and Robert van de Geijn, Toward Scalable Matrix Multiply on Multithreaded Architectures , Euroropean Conference on Parallel Processing, 13: 748--757 , August 2007 . B. Marker, F. Van Zee, K. Goto, G. Quintana-Orti and Robert van de Geijn, Toward Scalable Matrix Multiply on Multithreaded Architectures, Euroropean Conference on Parallel Processing, 13:748--757, August 2007."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.5555\/876880.879566"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/1248377.1248396"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/77626.79170"},{"key":"e_1_3_2_1_18_1","volume-title":"FLAME Working Note #20 TR-2006-23","author":"Goto K.","year":"2006","unstructured":"K. Goto and R. van de Geijn , High-performance implementation of the level-3 BLAS , FLAME Working Note #20 TR-2006-23 , The University of Texas at Austin, Department of Computer Sciences , 2006 . K. Goto and R. van de Geijn, High-performance implementation of the level-3 BLAS, FLAME Working Note #20 TR-2006-23, The University of Texas at Austin, Department of Computer Sciences, 2006."},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.5555\/509058.509096"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1016\/S0167-8191(00)00087-9"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2006.10"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1007\/s10766-007-0033-6"}],"event":{"name":"PPoPP08: ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages","ACM Association for Computing Machinery"],"location":"Salt Lake City UT USA","acronym":"PPoPP08"},"container-title":["Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1345206.1345218","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,1,8]],"date-time":"2023-01-08T10:26:25Z","timestamp":1673173585000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1345206.1345218"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,2,20]]},"references-count":22,"alternative-id":["10.1145\/1345206.1345218","10.1145\/1345206"],"URL":"https:\/\/doi.org\/10.1145\/1345206.1345218","relation":{},"subject":[],"published":{"date-parts":[[2008,2,20]]},"assertion":[{"value":"2008-02-20","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}