{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T00:17:47Z","timestamp":1729642667120,"version":"3.28.0"},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,9]]},"DOI":"10.1109\/wocn.2014.6923049","type":"proceedings-article","created":{"date-parts":[[2014,10,22]],"date-time":"2014-10-22T16:20:08Z","timestamp":1413994808000},"page":"1-4","source":"Crossref","is-referenced-by-count":5,"title":["Implementation of 8B\/10B encoder-decoder for Gigabit Ethernet Frame"],"prefix":"10.1109","author":[{"given":"Shivani","family":"Yadav","sequence":"first","affiliation":[]},{"given":"Sujata","family":"Pandey","sequence":"additional","affiliation":[]},{"given":"Ashutosh","family":"Gupta","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"year":"2004","journal-title":"Xilinx Logic Core Article","key":"3"},{"key":"2","first-page":"1522","article-title":"An 8B\/10B encoder with a modified coding table","volume":"1525","author":"kim","year":"2008","journal-title":"Circuits and Systems 2008 APCCAS 2008 IEEE Asia Pacific Conference on"},{"volume":"27","year":"1989","journal-title":"IBM Research and Development Journal","key":"10"},{"doi-asserted-by":"publisher","key":"1","DOI":"10.1109\/WOCN.2008.4542493"},{"key":"7","doi-asserted-by":"crossref","first-page":"440","DOI":"10.1147\/rd.275.0440","article-title":"A DC-balanced, partitioned-block 8b\/10b transmission code","volume":"27","author":"franaszek","year":"1983","journal-title":"IBM Journal of Resarch and Development"},{"doi-asserted-by":"publisher","key":"6","DOI":"10.1109\/SPL.2009.4914897"},{"key":"5","first-page":"1","article-title":"Design of dual-gigabit transceiver for fibre channel FC-1 layer","author":"sun","year":"2008","journal-title":"Electron Devices and Solid-state Circuits 2008 EDSSC 2008 IEEE International Conference on"},{"doi-asserted-by":"publisher","key":"4","DOI":"10.1109\/LPT.2004.828362"},{"doi-asserted-by":"publisher","key":"9","DOI":"10.1049\/el:20083140"},{"key":"8","first-page":"441","article-title":"A dc-d-block 8b\/10b transmission code [j]","volume":"23","author":"widmer","year":"1983","journal-title":"IBM Journal of Research and Development"},{"key":"11","first-page":"19","article-title":"Module based implementation of partial reconfiguration using vhdl on xilinx fpga","volume":"2","author":"raju kota","year":"2009","journal-title":"International Journal of Recent Trends in Engineering (IJRTE ISSN 1797-9617)"},{"key":"12","first-page":"40","volume":"5","author":"ashutosh","year":"2009","journal-title":"HDL Implementation of Sine-Cosine Function Using CORDIC Algorithm in 32-Bit Floating Point Format"}],"event":{"name":"2014 Eleventh International Conference on Wireless and Optical Communications Networks (WOCN)","start":{"date-parts":[[2014,9,11]]},"location":"Vijayawada, Guntur District, Andhra Pradesh, India","end":{"date-parts":[[2014,9,13]]}},"container-title":["2014 Eleventh International Conference on Wireless and Optical Communications Networks (WOCN)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6912065\/6923038\/06923049.pdf?arnumber=6923049","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T18:52:31Z","timestamp":1498157551000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6923049\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,9]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/wocn.2014.6923049","relation":{},"subject":[],"published":{"date-parts":[[2014,9]]}}}