{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T15:13:28Z","timestamp":1730301208068,"version":"3.28.0"},"reference-count":20,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,11]]},"DOI":"10.1109\/test.2010.5699247","type":"proceedings-article","created":{"date-parts":[[2011,1,21]],"date-time":"2011-01-21T20:20:08Z","timestamp":1295641208000},"page":"1-10","source":"Crossref","is-referenced-by-count":18,"title":["A programmable BIST for DRAM testing and diagnosis"],"prefix":"10.1109","author":[{"given":"P.","family":"Bernardi","sequence":"first","affiliation":[]},{"given":"M.","family":"Grosso","sequence":"additional","affiliation":[]},{"given":"M. Sonza","family":"Reorda","sequence":"additional","affiliation":[]},{"given":"Y.","family":"Zhang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2002.804101"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2001.957583"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2001.990315"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MTDT.2005.14"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.2004.1261019"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1995.529814"},{"year":"0","key":"ref16"},{"article-title":"Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits","year":"2000","author":"bushnell","key":"ref17"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1997.599439"},{"key":"ref19","first-page":"2721","article-title":"A Parallel Test Algorithm for Pattern Sensitive Faults in Semiconductor Random Access Memories","volume":"4","author":"lee","year":"1997","journal-title":"IEEE International Symposium on Circuits and Systems"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1989.82316"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/41.19076"},{"key":"ref6","first-page":"404","article-title":"An extended march test algorithm for embedded memories","author":"park","year":"1997","journal-title":"IEEE Asian Test Symposium"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cdt:19960334"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/54.748806"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VDAT.2009.5158152"},{"article-title":"Testing Semiconductor Memories: Theory and Practice","year":"1991","author":"van de goor","key":"ref2"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/DELTA.2002.994601"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2005.1584083"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/78949.78950"}],"event":{"name":"2010 IEEE International Test Conference (ITC)","start":{"date-parts":[[2010,11,2]]},"location":"Austin, TX, USA","end":{"date-parts":[[2010,11,4]]}},"container-title":["2010 IEEE International Test Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5684496\/5699173\/05699247.pdf?arnumber=5699247","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T09:40:02Z","timestamp":1490089202000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5699247\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,11]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/test.2010.5699247","relation":{},"subject":[],"published":{"date-parts":[[2010,11]]}}}