{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T12:50:08Z","timestamp":1730292608016,"version":"3.28.0"},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,11]]},"DOI":"10.1109\/reconfig.2016.7857156","type":"proceedings-article","created":{"date-parts":[[2017,2,16]],"date-time":"2017-02-16T22:20:29Z","timestamp":1487283629000},"page":"1-6","source":"Crossref","is-referenced-by-count":5,"title":["Automated synthesis of FPGA-based packet filters for 100 Gbps network monitoring applications"],"prefix":"10.1109","author":[{"given":"Jose Fernando","family":"Zazo","sequence":"first","affiliation":[]},{"given":"Sergio","family":"Lopez-Buedo","sequence":"additional","affiliation":[]},{"given":"Gustavo","family":"Sutter","sequence":"additional","affiliation":[]},{"given":"Javier","family":"Aracil","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2016.46"},{"key":"ref11","article-title":"Flex-fast lexical analyzer generator","author":"paxson","year":"1995","journal-title":"Lawrence Berkeley Laboratory"},{"key":"ref12","article-title":"Bison: the yacc-compatible parser generator","author":"donnelly","year":"1991","journal-title":"Free Software Foundation"},{"journal-title":"Xilinx","article-title":"UltraScale Architecture Integrated Block for 100G Ethernet v1.10","year":"2016","key":"ref13"},{"journal-title":"Xilinx","article-title":"VCU108 Evaluation Board, User Guide UG1066","year":"2016","key":"ref14"},{"key":"ref4","first-page":"24","article-title":"Ffpf: Fairly fast packet filters","volume":"4","author":"bos","year":"2004","journal-title":"OSDI"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/HPSR.2002.1024219"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TNET.2010.2056698"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TNET.2013.2290739"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ANCS.2011.12"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ANCS.2013.6665172"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/316188.316214"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/41457.37505"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2656877.2656890"}],"event":{"name":"2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","start":{"date-parts":[[2016,11,30]]},"location":"Cancun, Mexico","end":{"date-parts":[[2016,12,2]]}},"container-title":["2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7838017\/7856931\/07857156.pdf?arnumber=7857156","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,1]],"date-time":"2017-03-01T22:37:25Z","timestamp":1488407845000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7857156\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,11]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/reconfig.2016.7857156","relation":{},"subject":[],"published":{"date-parts":[[2016,11]]}}}