{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T03:41:54Z","timestamp":1725594114489},"reference-count":6,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,7]]},"DOI":"10.1109\/nanoarch47378.2019.181308","type":"proceedings-article","created":{"date-parts":[[2020,5,1]],"date-time":"2020-05-01T01:45:33Z","timestamp":1588297533000},"page":"1-2","source":"Crossref","is-referenced-by-count":1,"title":["Plasma Modified Silicon Nitride Resistive Switching Memories"],"prefix":"10.1109","author":[{"given":"P.","family":"Karakolis","sequence":"first","affiliation":[]},{"given":"P.","family":"Normand","sequence":"additional","affiliation":[]},{"given":"P.","family":"Dimitrakis","sequence":"additional","affiliation":[]},{"given":"L.","family":"Sygelou","sequence":"additional","affiliation":[]},{"given":"V.","family":"Ntinas","sequence":"additional","affiliation":[]},{"given":"I.A.","family":"Fyrigos","sequence":"additional","affiliation":[]},{"given":"I.","family":"Karafyllidis","sequence":"additional","affiliation":[]},{"given":"G. Ch.","family":"Sirakoulis","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1155\/2014\/578168"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1002\/adma.201502574"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-15290-5_3"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1016\/j.mee.2017.11.002"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1016\/j.jmat.2015.07.009"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2015.2441752"}],"event":{"name":"2019 IEEE\/ACM International Symposium on Nanoscale Architectures (NANOARCH)","start":{"date-parts":[[2019,7,17]]},"location":"Qingdao, China","end":{"date-parts":[[2019,7,19]]}},"container-title":["2019 IEEE\/ACM International Symposium on Nanoscale Architectures (NANOARCH)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9060423\/9073194\/09073660.pdf?arnumber=9073660","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,17]],"date-time":"2022-07-17T21:47:05Z","timestamp":1658094425000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9073660\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,7]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/nanoarch47378.2019.181308","relation":{},"subject":[],"published":{"date-parts":[[2019,7]]}}}