{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,3,14]],"date-time":"2024-03-14T10:59:38Z","timestamp":1710413978626},"reference-count":7,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2014,12,1]],"date-time":"2014-12-01T00:00:00Z","timestamp":1417392000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Embedded Syst. Lett."],"published-print":{"date-parts":[[2014,12]]},"DOI":"10.1109\/les.2014.2327114","type":"journal-article","created":{"date-parts":[[2014,5,29]],"date-time":"2014-05-29T18:03:33Z","timestamp":1401386613000},"page":"65-68","source":"Crossref","is-referenced-by-count":9,"title":["Function-Level Processor (FLP): A High Performance, Minimal Bandwidth, Low Power Architecture for Market-Oriented MPSoCs"],"prefix":"10.1109","volume":"6","author":[{"given":"Hamed","family":"Tabkhi","sequence":"first","affiliation":[]},{"given":"Robert","family":"Bushey","sequence":"additional","affiliation":[]},{"given":"Gunar","family":"Schirner","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669160"},{"key":"ref3","first-page":"312","article-title":"Efficient data streaming with on-chip accelerators: Opportunities and challenges","author":"rui","year":"2011","journal-title":"Proc IEEE Int l Symp High-Performance Computer Architecture (HPCA)"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2013.6810535"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.85"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2012.6237004"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2011.89"},{"key":"ref1","first-page":"53","volume":"9","year":"2010","journal-title":"Int Technology Roadmap for Semiconductors (ITRS)"}],"container-title":["IEEE Embedded Systems Letters"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4563995\/6954216\/06823166.pdf?arnumber=6823166","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:01:03Z","timestamp":1642003263000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6823166\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,12]]},"references-count":7,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/les.2014.2327114","relation":{},"ISSN":["1943-0663","1943-0671"],"issn-type":[{"value":"1943-0663","type":"print"},{"value":"1943-0671","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,12]]}}}