{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T13:27:30Z","timestamp":1725542850055},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2005]]},"DOI":"10.1109\/iwsoc.2005.19","type":"proceedings-article","created":{"date-parts":[[2005,11,15]],"date-time":"2005-11-15T15:48:27Z","timestamp":1132069707000},"page":"101-106","source":"Crossref","is-referenced-by-count":1,"title":["A novel clock recovery scheme with improved jitter tolerance for PAM4 signaling"],"prefix":"10.1109","author":[{"family":"Hyoungsoo Kim","sequence":"first","affiliation":[]},{"family":"Youngsik Hur","sequence":"additional","affiliation":[]},{"family":"Moonkyun Maeng","sequence":"additional","affiliation":[]},{"given":"F.","family":"Bien","sequence":"additional","affiliation":[]},{"given":"S.","family":"Chandramouli","sequence":"additional","affiliation":[]},{"given":"E.","family":"Gebara","sequence":"additional","affiliation":[]},{"given":"J.","family":"Laskar","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","first-page":"308","article-title":"A DSP based receiver for 1000BASE-T PHY","author":"he","year":"2001","journal-title":"IEEE International Solid-State Circuits Conference"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/4.841504"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.1994.379684"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.818572"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/9780470545331"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/4.18592"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/SOC.2003.1241531"},{"key":"4","first-page":"92","article-title":"Clock recovery in high-speed multilevel serial links","author":"musa","year":"2004","journal-title":"IEEE International Symposium on Circuits and Systems"},{"journal-title":"A Versatile Clock Recovery Architecture and Monolithic Implementation","year":"0","author":"de vito","key":"9"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1049\/el:19750415"},{"year":"0","author":"altmann","key":"11"}],"event":{"name":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","start":{"date-parts":[[2005,7,20]]},"location":"Banff, Alta., Canada","end":{"date-parts":[[2005,7,24]]}},"container-title":["Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/10246\/32666\/01530923.pdf?arnumber=1530923","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,14]],"date-time":"2017-03-14T16:46:46Z","timestamp":1489510006000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1530923\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/iwsoc.2005.19","relation":{},"subject":[],"published":{"date-parts":[[2005]]}}}